Low-density parity check (LDPC) codes have attracted the attention of a large number of researchers with its near-Shannon performance and easy implementation features. As a data coding scheme under the 5G scenario, how to achieve efficient encoding/decoding for LDPC codes has become one of the important research topics. Under this condition, this paper 1) proposes a novel decoding algorithm for LDPC codes using the Markov Chain Monte Carlo (MCMC) method and 2) introduces two improved versions, MCMC-S and MCMC-L, which achieve better results. Simulation figures show that the improved methods outperform the traditional belief propagation (BP) decoding method in relatively short codes by more than 1 dB at the bit error rate (BER) of 10-3. Very large scale integration (VLSI) architecture of the proposed method is also given in this paper.
Low-density parity check (LDPC) codes have attracted the attention of a large number of researchers with its near-Shannon performance and easy implementation features. As a data coding scheme under the 5G scenario, how to achieve efficient encoding/decoding for LDPC codes has become one of the important research topics. Under this condition, this paper 1) proposes a novel decoding algorithm for LDPC codes using the Markov Chain Monte Carlo (MCMC) method and 2) introduces two improved versions, MCMC-S and MCMC-L, which achieve better results. Simulation figures show that the improved methods outperform the traditional belief propagation (BP) decoding method in relatively short codes by more than 1 dB at the bit error rate (BER) of 10-3. Very large scale integration (VLSI) architecture of the proposed method is also given in this paper.
Monte Carlo Markov chain (MCMC) decoding is a randomized algorithm which has been proven to be near-optimal in terms of decoding error probability. However, the exponentially slow mixing rate of Markov chains seems to preclude MCMC decoding from applications concerning even short blocklength codes. In contrast, belief propagation (BP) is a deterministic algorithm that is empirically fast but sub-optimal in error rate when it is used to decode low-density parity-check (LDPC) codes. In this paper, a code-independent BP-MCMC hybrid decoder is devised for short-blocklength LDPC codes. Theoretical error analysis of the hybrid algorithm is provided. Preliminary experiments show that the preprocessing of BP successfully reduces the time complexity of MCMC decoding and hence significantly improves the applicability of MCMC decoders to short LDPC codes.
After the introduction of iterative coding, Low Density Parity Check (LDPC) codes have received a lot of attention due to their remarkable near Shannon-limit performance and practical decoder implementation. However, when employing an LDPC code for various applications, multiple issues do arise at the simulation, algorithm and implementation levels. The first issue is the performance evaluation of the iterative LDPC decoder in the very low Bit Error Rate (BER) regions. So far, no analytical tool has been developed to evaluate the performance of LDPC codes. Unfortunately standard Monte Carlo (MC) simulations cannot be used for performance estimation in these low BER regions due to prohibitive execution times. The second issue is the efficiency of the decoding algorithm. Due to the presence of short cycles in the bipartite graph, sum-product decoding algorithms lead to considerable performance loss for short block-length LDPC codes and produce error floors for longer codes. In addition, the iterative processing and estimation of soft probabilistic values with these algorithms result in very high computational complexity, which in turn impedes the adoption of LDPC codes for power constrained systems. Another prime objective is to design a high throughput decoder architecture which is capable of supporting multiple rates and variable code lengths within minimal area.
This work aims to address and provide solutions to the above problems. As a solution to the performance estimation problem of LDPC codes, a highly efficient and novel fast BER simulation technique is developed. At the algorithm level, a performance improvement and error floor avoidance method is introduced, and a computationally efficient algorithm is developed for the sum-product decoding of LDPC codes. And finally, at the architecture level, a high throughput multi-rate variable code length implementation is presented which, when implemented, efficiently minimizes device resources while alleviating the routing complexity of the decoder.
Low-density parity-check (LDPC) codes have been selected as the channel coding scheme for 5G NR standard, which have excellent performance approaching the Shannon limit and are easy to implement in hardware. The decoding algorithm and scheduling scheme of LDPC codes have a significant impact on performance. The row degree (RD) and the number of punctured bits (PBs) are widely used to determine the update order of layers. In this letter, we used Matlab to simulate the error performance of the 5G LDPC codes. We completed the bit error rate and frame error rate simulations of six different decoding algorithms, including flooding LLR-BP, flooding NMS, layered LLR-BP, layered NMS, the lowest degree and least-punctured (LD-LP) layered LLR-BP and LD-LP layered NMS methods, for the 5G LDPC code with a base graph of size [46, 68], code rate 1/3, and code length of 1584.We further compared the performance of LD-LP layered decoding and LP-LD layered decoding. Moreover, we simulated the error performance of the core part of the LDPC code, which consists of four layers. We evaluated the effect of the update order of the four layers on the error performance of the code, and concluded that some update orders might give slightly better error performance than others.
Low-Density Parity-Check (LDPC) codes are one of the most popular codes used in nowadays’ communication due to their high coding efficiency at low decoding complexity. With these characteristics, LDPC codes are suitable for high-speed information transmission systems. The widely used decoding algorithm for LDPC codes is Belief Propagation (BP) decoding with which the performance of LDPC codes can approach the Shannon limit. With the development of 5G, a lot of attention is given to the so-called ultra-reliable low latency communication scenario which needs the short code to transmit. However, short codes will not have a very good performance with BP decoding. To solve this problem, investigations have been done such as multiple-bases BP decoding. Although this decoding method has a better performance than BP decoding, it will cause a high complexity in the hardware implementation. Besides, an investigation on the stochastic decoding for shortcodes was proposed in 2003. This decoding method is hardware friendly, but its performance can only approach BP decoding. Inspired by multiple-bases BP decoding and stochastic decoding, binary stochastic decoding with parallel decoders is proposed in this thesis firstly. It represents stochastic sequences with multiple parallel Tanner graphs and uses hard-decision decoding in the iterative part because of the binary input bits. However, this decoding method has a severe performance loss compared to BP decoding. To avoid this problem, the enhancement method is used to make the binary sequences be non-binary sequences that can form more powerful parallel decoders. Then the non-binary symbols of these new sequences are transformed to their corresponding log-likelihood ratio which enables the iterative part to use BP decoding. In addition, combining with the ML decision of list decoding, the decision part of our stochastic decoder can fully utilize the output to increase the efficiency of the decoding method. After ensuring the performance of our non-binary stochastic decoding to be better than BP decoding, the complexity of the decoder is reduced to save the computational resources. Finally, with constant adjustments, the bit width of each non-binary symbol is determined to be 15, and the sequence length is reduced to 20 which can let the non-binary stochastic decoding has an acceptable complexity while keeping good performance.
Low density parity check (LDPC) codes over are an extension of binary LDPC codes with significantly higher performance. However, the computational complexity of the encoders/decoders for these codes is also higher. Hence there is a substantial lack of hardware implementations for LDPC over codes. This paper proposes a novel variation of the belief propagation algorithm for LDPC codes. The new algorithm results in a reduced hardware complexity when imple- mented in VLSI. The serial architecture of the novel decoding algorithm and two other algorithms for LDPC over are implemented on an FPGA. The results show that the proposed algorithm has substantial advantages over existing methods. We show that the implementation of LDPC over decoder is feasible for short to medium length codes. The additional com- plexity of the decoder is balanced by the superior performance of LDPC codes.
An effective way of improving decoding performance of an LDPC code is to extend the single-decoder decoding method to a parallel decoding method with multiple sub-decoders. To this end, this paper proposes a parallel decoding method for the LDPC codes constructed by m-sequence. In this method, the sub-decoders have two types. The first one contains only one decoding module using the original parity-check constraints to implement a belief propagation (BP) algorithm. The second one consists of a pre-decode module and a decoding module. The parity-check matrices for pre-decode modules are generated by the parity-check constraints of the sub-sequences sampled from an m-sequence. Then, the number of iterations of the BP process in each pre-decode module is set as half of the girth of the parity-check matrix, resulting in the elimination of the impact of short cycles. Using maximum a posterior (MAP), the least metric selector (LMS) finally picks out a codeword from the outputs of sub-decoders. Our simulation results show that the performance gain of the proposed parallel decoding method with five sub-decoders is about 0.4 dB, compared to the single-decoder decoding method at the bit error rate (BER) of 10−5.