Designing neural network based decoders for surface codes

Syed Ali, Hiroshi Tanaka, Muhammad Khan

Savvas Varsamopoulos, Koen Bertels, Carmen G. Almudéver

Abstract There has been a rise in decoding quantum error correction codes with neural network–based decoders, due to the good decoding performance achieved and adaptability to any noise model. However, the main challenge is scalability to larger code distances due to an exponential increase of the error syndrome space. Note that successfully decoding the surface code under realistic noise assumptions will limit the size of the code to less than 100 qubits with current neural network–based decoders. Such a problem can be tackled by a distributed way of decoding, similar to the renormalization group (RG) decoders. In this paper, we introduce a decoding algorithm that combines the concept of RG decoding and neural network–based decoders. We tested the decoding performance under depolarizing noise with noiseless error syndrome measurements for the rotated surface code and compared against the blossom algorithm and a neural network–based decoder. We show that a similar level of decoding performance can be achieved between all tested decoders while providing a solution to the scalability issues of neural network–based decoders.

Claire E. Badger

Savvas Varsamopoulos

Quantum error correction (QEC) is key to have reliable quantum computation and storage, due to the fragility of qubits in current quantum technology and the imperfect application of quantum operations. In order to have efficient quantum computation and storage, active QEC is required. QEC consists of an encoding and a decoding process. The way that encoding protects quantum information is through grouping many unreliable physical qubits into one more reliable logical qubit. Then, computation occurs based on the logical qubits, however, errors still occur on the physical qubits. Decoding is the process of identifying the location and type of errors occurring on the physical qubits. The decoder proposes corrections against the errors that have been identified. In this thesis, we are exploring novel ways to design decoders for QEC codes, focusing on the surface code. We began our investigation by implementing a rule-based decoder for the smallest surface code, which consists of 17 qubits. We incorporated this decoder to a platform that we created, called Quantum Platform Development Framework (QPDO), in order to study the working principles of a Pauli frame and to quantify its potential effect on the decoding performance. The Pauli frame unit keeps track of errors on physical qubits without the need to apply corrections constantly. We quantified through simulation the benefits in terms of the decoding performance and the execution schedule of QEC, minimizing the idle time. Minimizing the execution time is critical, due to the limited time budget of quantum error correction, thus requiring a high speed decoder capable of still reaching high decoding performance. We show that when the decoding time is equal to the time required to run a surface code cycle, the decoder reaches its maximum performance. However, such a rule-based decoder cannot easily scale to larger quantum systems, therefore other decoding approaches should be considered. Most of the classical decoders that have been developed so far, do not have a good balance between short execution time and high decoding performance. Therefore, we proposed decoders that incorporate neural networks to keep the execution time small, while keeping the decoding performance high. We designed a two-module decoder, which included a classical module and a neural network. We named this configuration neural network based decoder (NNbD). We compare different designs of NNbDs with classical decoders and prove that NNbDs can reach similar or better decoding performance compared to classical decoders while having constant execution time. Furthermore, we quantified the execution time of a NNbD and argued about the speed that can be achieved in a hardware chip like a Field Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC). Both the classical module and the neural network are highly parallelizable and fast modules by construction, leading to constant execution time for a given code distance. We proved that neural network based decoders can adapt to any noise model, since the neural network functionality is based on creating a map between the input and output data, requiring no knowledge about the underlying error model. Following that, a comparison between different NNbD design approaches was performed. We show that it is advantageous to start with a classical decoding module and improve on its decoding performance with a neural network rather than having a neural network perform the decoding on its own. Also, in the latter case, the execution time of such a decoder is non-constant and on average larger than the decoder containing a classical module and a neural network. Moreover, we show that for the design containing a classical module and a neural network, the execution time is increasing linearly as the code distance increased, which was mainly attributed to the increase of the size of the neural network. However, there is a fundamental difference between NNbDs and classical decoders in that NNbDs require sampling and training based on data obtained from the problem, unlike classical decoders. As the code distance increases, the amount of data required to be gathered and trained are exponentially increasing, imposing a limit to the size of the quantum system that can be efficiently decoded. We proposed as a solution to have a distributed decoding approach that divides the code into small regions and then decodes each region locally. We show that using such a distributed decoding approach for small code distances does not lead to significant loss in decoding performance, while simultaneously providing a way to decode large code distances. Thus, we were able to create a decoder that can achieve high decoding performance with constant execution time. However, there are still some issues to keep in mind with such kind of decoders. The main challenge of NNbDs is that they are a dedicated decoder for a given problem. Every time that some aspect of the problem changes (quantum error correcting code, code distance, error model), sampling, training and evaluating the decoder needs to be repeated. Moreover, there is a large number of neural network parameters that need to be specifically tuned when the problem changes. A careful study of the design choices is required to maximize the performance of the decoder. We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial.

Ramon W. J. Overwater, Masoud Babaie, Fabio Sebastiano

Quantum Error Correction (QEC) is required in quantum computers to mitigate the effect of errors on physical qubits. When adopting a QEC scheme based on surface codes, error decoding is the most computationally expensive task in the classical electronic back-end. Decoders employing neural networks (NN) are well-suited for this task but their hardware implementation has not been presented yet. This work presents a space exploration of fully-connected feed-forward NN decoders for small distance surface codes. The goal is to optimize the neural network for high decoding performance, while keeping a minimalistic hardware implementation. This is needed to meet the tight delay constraints of real-time surface code decoding. We demonstrate that hardware based NN-decoders can achieve high decoding performance comparable to other state-of-the-art decoding algorithms whilst being well below the tight delay requirements (440 ns) of current solid-state qubit technologies for both ASIC designs (<30 ns) and FPGA implementations (<90 ns). These results indicate that NN-decoders are viable candidates for further exploration of an integrated hardware implementation in future large-scale quantum computers.

Wang Ming, Yong Li, Jianqing Liu +3 more