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IEEE Transactions on Communications

Design of Nonbinary LDPC Codes Based on Message-Passing Algorithms

Sunghye Cho, Kyungwhoon Cheun, Kyeongcheol Yang

Published Jun 19, 2018• 6 citations
Publisher

Abstract

Short cycles in a nonbinary low-density parity-check (NB-LDPC) code may be even more harmful to its performance if they do not satisfy the so-called full rank condition (FRC). This is because they may induce low-weight codewords or absorbing sets in that case. Thus, it is important to count the number of short cycles not satisfying the FRC as well as the number of short cycles for analyzing the performance of an NB-LDPC code. In this paper, we first develop a novel message-passing algorithm and identify how it is related to the FRC. We then propose a low-complexity algorithm for counting the number of short cycles not satisfying the FRC in an NB-LDPC code, as well as the number of short cycles. Finally, we propose a low-complexity algorithm for designing an NB-LDPC code with low error floor. Depending on the modulation scheme, the codes constructed by the proposed design algorithm have similar or slightly worse performance, compared with those constructed via the method by Poulliat et al. However, the proposed design algorithm does not require a cycle enumeration algorithm with high complexity, and therefore is feasible even in the case of large code length, say ≥5000.

DOI
10.1109/tcomm.2018.2849076

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Short cycles in a nonbinary low-density parity-check (NB-LDPC) code may be even more harmful to its performance if they do not satisfy the so-called full rank condition (FRC). This is because they may induce low-weight codewords or absorbing sets in that case. Thus, it is important to count the number of short cycles not satisfying the FRC as well as the number of short cycles for analyzing the performance of an NB-LDPC code. In this paper, we first develop a novel message-passing algorithm and identify how it is related to the FRC. We then propose a low-complexity algorithm for counting the number of short cycles not satisfying the FRC in an NB-LDPC code, as well as the number of short cycles. Finally, we propose a low-complexity algorithm for designing an NB-LDPC code with low error floor. Depending on the modulation scheme, the codes constructed by the proposed design algorithm have similar or slightly worse performance, compared with those constructed via the method by Poulliat et al. However, the proposed design algorithm does not require a cycle enumeration algorithm with high complexity, and therefore is feasible even in the case of large code length, say ≥5000.
Trapping sets with short cycles are known to give a detrimental effect on the error floor performance of a low-density parity-check (LDPC) code. Unlike in binary LDPC codes., short cycles in a nonbinary low-density parity-check (NB-LDPC) code may be even more harmful to its performance if they do not satisfy the so-called full rank condition (FRC). This is because they may induce low-weight codewords or absorbing sets in that case. Thus, it is crucial to count the number of short cycles not satisfying the FRC as well as the number of short cycles for analyzing the performance of an NB-LDPC code. In this paper, we first develop a novel message-passing algorithm and identify how it is related to the FRC. We then propose a low-complexity algorithm for counting the number of short cycles not satisfying the FRC in an NB-LDPC code, as well as the number of short cycles.
In this thesis, we propose low-complexity designing algorithms for non-binary low-density parity-check (NB-LDPC) codes over GF(q) with low error floor and low-complexity decoding algorithms for binary LDPC codes. We first propose a low-complexity designing algorithm for for NB-LDPC codes over GF(q) based on message-passing algorithms. Short cycles in an NB-LDPC code may be even more harmful to its performance if they do not satisfy the so-called full rank condition (FRC). This is because they may induce low-weight codewords or absorbing sets in that case. Thus, it is crucial to count the number of short cycles not satisfying the FRC as well as the number of short cycles for analyzing the performance of an NB-LDPC code. In order to count those cycles, we first develop a novel message-passing algorithm and identify how it is related to the FRC.We then propose a low-complexity algorithmfor counting the number of short cycles not satisfying the FRC in an NB-LDPC code, as well as the number of short cycles. The proposed algorithm is not only theoretically validated, but its computational and storage complexities are also computed. It does not require cycle enumeration with high complexity, and therefore is still feasible even in the case of large code length, say ≤ 5000, unlike the conventional methods. Based on it, we also provide a locally optimal rule to choose a nonzero element for a given edge and propose a low-complexity algorithm for designing an NB-LDPC code with low error floor. Furthermore, several design examples are presented to verify the validity of the proposed design algorithm. Secondly, we propose a low-complexity decoding algorithm for binary LDPC codes over the binary symmetric channel (BSC). The min-sum (MS) algorithm is a low-complexity decoding algorithm for binary LDPC codes and has lower computational complexity than the sum-product algorithm (SPA). Since the MS algorithm is an approximation of the SPA, it has performance degradation. Furthermore, reducing the number of bits for representing messages to two in a decoding algorithm for further reducing computational and storage complexities, causes significant performance losses. In order to minimize the performance degradation and computational and storage complexities, we propose a low-complexity decoding algorithm which uses several decoders with two-bit precision for binary LDPC codes over the BSC. The proposed algorithm adaptively changes decoders according to the number of unsatisfied check nodes at each iteration. Compared with the SPA using floating-point operations, the proposed decoding algorithm greatly reduces computational and storage complexities with negligible performance losses. Numerical results show that the proposed decoding algorithm has similar performance to the SPA with floating-point operations over the BSC. In the last part of this thesis, low-complexity decoding algorithms of binary LDPC codes for the core layer at fixed receivers in ATSC 3.0 are proposed. Gallager’s decoding algorithms …
Following Poulliat et al.'s design of (2, dc) nonbinary LDPC (NB-LDPC) codes, this paper designs high-rate irregular NB-LDPC codes by addressing the problem of minimum symbol distance. The design procedure first identifies all stopping sets up to weight five in an LDPC code and enumerates them via a message passing algorithm. For each identified stopping set, careful labeling forces its corresponding parity-check sub-matrix to be full rank, thereby preventing the stopping set from being a sub-code and ensuring a minimum distance of at least six symbols. Simulation results for codes designed through this procedure show a significant improvement in the error-floor region over randomized labeling.
This paper improves the full rank condition (FRC) to construct nonbinary LDPC codes for binary AWGN channels, in which there is usually a one-bit error in one erroneous symbol. When assigning values to symbols in a cycle, our improved FRC condition not only considers rank deficiency, but also prefers values with the smallest probability that the related checks are mistakenly satisfied due to one-bit errors in these symbols. Finally, we present the IFRC-based optimization algorithm performs row-wise optimization on the non-zero elements of the parity-check matrix. Simulation results show the effectiveness of IFRC compared to FRC: the error-correcting performance is improved by 0.1dB to 0.5dB, and the error floor can be reduced by up to an order of magnitude.
Short or moderate-length non-binary low-density parity-check (NB-LDPC) codes have the potential applications in future low latency and high-reliability communication thanks to the strong error correction capability and parallel decoding. Because of the existence of the error floor, the NB-LDPC codes usually cannot satisfy very low bit error rate (BER) requirements. In this paper, a low-complexity method is proposed for optimizing the minimum distance of the NB-LDPC code in a progressive chord edge growth manner. Specifically, each chord edge connecting two non-adjacent vertices is added to the Hamiltonian cycle one-by-one. For each newly added chord edge, the configuration of non-zero entries corresponding to the chord edge is determined according to the so-called full rank condition (FRC) of all cycles that are related to the chord edge in the obtained subgraph. With minor modifications to the designed method, it can be used to construct the NB-LDPC codes with an efficient encoding structure. The analysis results show that the method for designing NB-LDPC codes while using progressive chord edge growth has lower complexity than traditional methods. The simulation results show that the proposed method can effectively improve the performance of the NB-LDPC code in the high signal-to-noise ratio (SNR) region. While using the proposed scheme, an NB-LDPC code with a quite low BER can be constructed with extremely low complexity.
In this paper, an improved full rank condition (named as λ-FRC) is proposed for the construction of nonbinary LDPC codes. Compared with the conventional FRC, the λ-FRC introduces a metric λ to evaluate the reliability of the messages passing through the circle. Codes with better performance can be obtained by selecting elements of the parity matrix according to the metric. Based on the λ-FRC, a greedy search algorithm is proposed to design the codes efficiently. In order to further improve the performance of the codes constructed, an iterative search algorithm is applied in the construction. Simulation results show that the performance of codes constructed by the λ-FRC methods outperforms those by the FRC methods, and the iterative search algorithm improves the performance of the codes as the iteration number increases1.