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IEEE East-West Design & Test Symposium (EWDTS)

Quantum sequencer for the minimal test synthesis of black-box functionality

Vladimir I. Hahanov, Igor Iemelianov, Svetlana V. Chumachenko, Ivan Hahanov, Irina Hahanova

Published Sep 1, 2017• 7 citations
Publisher

Abstract

Quantum memory-driven computing on the classical computers for design and test of black-box functionality is considered. A method for synthesis and minimization test for the black-box functionality, based on a qubit derivative matrix and sequencer for searching a quasi-optimum coverage, is proposed. Examples of quantum memory-driven design and test minimization of the Schneider logic circuit are presented. An architecture and algorithm for parallel search of a quasi-minimal set of test vectors based on the logical structure is developed. The technological advantages of the qubit coverage leverage for increasing the speed of performance due to the parallel solution of the test synthesis and analysis for single stuck-at-faults of external and internal variables are shown.

DOI
10.1109/ewdts.2017.8110148

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Cyberculture of quantum memory-driven computing integrates emerging technologies of parallel solution for time-consuming combinatorial problems. A scalable map of research relevant to quantum cyberculture is aimed at creating parallel algorithms for SoC Design and Test. The memory-driven innovation architecture of quantum computing is presented, which is defined by the leverage of photon read-write transactions on the structure of electrons in the absence of logic, associated with superposition and entanglement. A class of logical X-functions and their qubit models is introduced, that are technologically feasible for test, diagnosis, and fault simulation of SoC components. The architecture of services for design, test and verification of digital devices based on qubit models of logical primitives is described. A service for fault-free circuits simulation based on the qubit coverage of functional primitives is given. The models, cubit data structures and methods are focused and simulated on the classical computers by leveraging unitary coding binary states.
"Quantum " data structures for synthesis of digital system are proposed. They are based on transactions between addressable memory components to implement any functionality. The new approach of logic function minimization for synthesis of digital systems is proposed. It is supposed to apply vector form (quantum) of description logic and sequential structures implemented into memory elements. This approach remarkably differs from the common synthesis theory of discrete devices based on truth tables of components. It is based on an opportunity of applying quantum or qubit data structures [1-5] in modern computers when doing calculating processes with the purpose of unary coding states of input, internal and output variables, and also on the technology of qubit-vectors implementation into memory elements FPGA, which realize combinational and sequential primitives. The use of quantum memory-based only models for describing digital components when computer systems design would allow us to increase yield, enhance reliability of computers, make the process of design and production of devices cheaper, and also provides human-free repairing in remote & online mode.
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Abstract – The qubit (quantum) structure of data and computing processes that allows significantly increasing the speed of binary optimization problem decisions was proposed. The hardware parallel models (one cycle) for Boolean (set of all subsets) calculation on the basis of n-element universum for coverage decision solutions, boolean function optimizations, compression of data, digital systems synthesis and analysis that use the Hasse diagram for implementation processor structure were described. Index Terms – quantum computing, hardware model, Boolean function, processor. I. I NTRODUCTION The purpose of the qubit-processor creation is significant reduction of time that needs to decision of the optimization problems by using concurrent calculation of the vector logical operations [1-3] over the set of all subsets of the primitives through the cost of increasing the memory size for intermediate data saving. Problems of the research are the follows: 1) Definition of data structures for boolean decision coverage problem of columns of a matrix M =M