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Custom Integrated Circuits Conference

Using quantum emulation for advanced computation

Brian R. La Cour, Granville E. Ott, S. Andrew Lanham

Published Apr 1, 2017• 4 citations
Publisher

Abstract

A novel concept for advanced computation is considered using an analog electronic emulation of a gate-based quantum computer. We discuss a general classes of problems for which such a device is well suited, examine the expected computational speedup versus bandwidth, and describe the measured performance of a small-scale hardware prototype.

DOI
10.1109/cicc.2017.7993631

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A novel concept for advanced computation is considered using an analog electronic emulation of a gate-based quantum computer. We discuss a general classes of problems for which such a device is well suited, examine the expected computational speedup versus bandwidth, and describe the measured performance of a small-scale hardware prototype.
As quantum computers of non-trivial size become available in the near future, it is imperative to develop tools to emulate small quantum computers. This allows for validation and debugging of algorithms as well as exploring hardware-software co-design to guide the development of quantum hardware and architectures. The simulation of quantum computers entails multiplications of sparse matrices with very large dense vectors of dimension 2n, where n denotes the number of qubits, making this a memory-bound and network bandwidth-limited application. We introduce the concept of a quantum computer emulator as a component of a software framework for quantum computing, enabling a significant performance advantage over simulators by emulating quantum algorithms at a high level rather than simulating individual gate operations. We describe various optimization approaches and present benchmarking results, establishing the superiority of quantum computer emulators in terms of performance.
Quantum computers are regarded as the future of computing, as they are believed to be capable of solving extremely complex problems that are intractable on conventional digital computers. However, near-term quantum computers are prone to a plethora of noise sources that are difficult to mitigate, possibly limiting their scalability and precluding us from running any useful algorithms. Quantum emulation is an alternative approach that uses classical analog hardware to emulate the properties of superposition and entanglement, thereby mimicking quantum parallelism to attain similar speeds. By contrast, the use of classical digital hardware, such as field programmable gate arrays (FPGA), is less inefficient at emulating a quantum computer, as it does not take advantage of the fundamentally analog nature of quantum states. Consequently, this approach adds an inherent hardware overhead that also prevents scaling. In this work, an energy-efficient quantum emulator based on analog circuits realized in UMC 180-nm CMOS technology is proposed along with the design methodologies for a scalable computing architecture. A six-fold improvement in power consumption was observed over the FPGA-based approach for a ten-qubit emulation of Grover's search algorithm. The proposed emulator is also about 400 times faster than a Ryzen 5600x six-core processor performing a simulation of six-qubit Grover's search algorithm
Quantum computers provide a fundamentally new computing paradigm that promises to revolutionize our ability to solve broad classes of problems. Surprisingly, the basic mathematical structures of gate-based quantum computing, such as unitary operations on a finite-dimensional Hilbert space, are not unique to quantum systems but may be found in certain classical systems as well. Previously, it has been shown that one can represent an arbitrary multi-qubit quantum state in terms of classical analog signals using nested quadrature amplitude modulated signals. Furthermore, using digitally controlled analog electronics one may manipulate these signals to perform quantum gate operations and thereby execute quantum algorithms. The computational capacity of a single signal is, however, limited by the required bandwidth, which scales exponentially with the number of qubits when represented using frequency-based encoding. To overcome this limitation, we introduce a method to extend this approach to multiple parallel signals. Doing so allows a larger quantum state to be emulated with the same gate time required for processing frequency-encoded signals. In the proposed representation, each doubling of the number of signals corresponds to an additional qubit in the spatial domain. Single quit gate operations are similarly extended so as to operate on qubits represented using either frequency-based or spatial encoding schemes. Furthermore, we describe a method to perform gate operations between pairs of qubits represented using frequency or spatial encoding or between frequency-based and spatially encoded qubits. Finally, we describe how this approach may be extended to represent qubits in the time domain as well.
Quantum computing offers immense speedup in performing tasks such as data encryption and searching. The quantum algorithms can be modeled using classical computing devices, however classical computer simulations cannot deal efficiently with the parallelism present in quantum algorithms. The quantum circuit model for quantum algorithms is sufficient to describe the known quantum algorithms. Using analogies between quantum and digital circuits, we design the emulator of quantum algorithms in FPGAs that allows efficient experimentation with new quantum algorithms. This paper concentrates on new techniques for modeling quantum circuits, including the entanglement and probabilistic computing realization, as well as the critical issues in the required precision of computing.
In this paper we present a novel approach to emulating a universal quantum computer with a classical system, one that uses a signal of bounded duration and amplitude to represent an arbitrary quantum state. The signal may be of any modality (e.g., acoustic, electromagnetic, etc), but we focus our discussion here on electronic signals. Unitary gate operations are performed using analog electronic circuit devices, such as four-quadrant multipliers, operational amplifiers, and analog filters, although non-unitary operations may be performed as well. In this manner, the Hilbert space structure of the quantum state, as well as a universal set of gate operations, may be fully emulated classically. The required bandwidth scales exponentially with the number of qubits, however, thereby limiting the scalability of the approach, but the intrinsic parallelism, ease of construction, and classical robustness to decoherence may nevertheless lead to capabilities and efficiencies rivaling that of current high performance computers.