As quantum computers of non-trivial size become available in the near future, it is imperative to develop tools to emulate small quantum computers. This allows for validation and debugging of algorithms as well as exploring hardware-software co-design to guide the development of quantum hardware and architectures. The simulation of quantum computers entails multiplications of sparse matrices with very large dense vectors of dimension 2n, where n denotes the number of qubits, making this a memory-bound and network bandwidth-limited application. We introduce the concept of a quantum computer emulator as a component of a software framework for quantum computing, enabling a significant performance advantage over simulators by emulating quantum algorithms at a high level rather than simulating individual gate operations. We describe various optimization approaches and present benchmarking results, establishing the superiority of quantum computer emulators in terms of performance.
As quantum computers of non-trivial size become available in the near future, it is imperative to develop tools to emulate small quantum computers. This allows for validation and debugging of algorithms as well as exploring hardware-software co-design to guide the development of quantum hardware and architectures. The simulation of quantum computers entails multiplications of sparse matrices with very large dense vectors of dimension 2n, where n denotes the number of qubits, making this a memory-bound and network bandwidth-limited application. We introduce the concept of a quantum computer emulator as a component of a software framework for quantum computing, enabling a significant performance advantage over simulators by emulating quantum algorithms at a high level rather than simulating individual gate operations. We describe various optimization approaches and present benchmarking results, establishing the superiority of quantum computer emulators in terms of performance.
With rapid advancement in quantum computing technology, continuous efforts are being directed to simulation and emulation of quantum algorithms on classical platforms. A well-known limitation to classical emulation of quantum circuits is scalability. Existing hardware emulators implement gate-based circuit models of quantum circuits that result in heavy resource utilization and degrade the scalability of the system. Also, current quantum emulation hardware use fixedpoint arithmetic, which has an adverse effect on accuracy when the system is scaled up. In this work, we employ a complexmultiply-and-accumulate (CMAC) and lookup-based emulation approach that greatly reduces resource utilization and improves system scalability in terms of number of emulated qubits. We demonstrate emulation of up to 16 fully-entangled qubits which is highest among existing work. We design fully-pipelined, highthroughput hardware architectures that use floating-point precision for higher accuracy. Experimental evaluation and analysis of the architectures in terms of speed and area is also provided. The emulator is prototyped on a high-performance reconfigurable computing (HPRC) system and our results demonstrate quantitative improvement over existing Field-Programmable-Gate-Array (FPGA)-based hardware emulators.
Evaluating quantum algorithms at utility-scale—involving more than 100 qubits—is a key step toward advancing real-world applications of quantum computing. In this study, we benchmark seven state-of-the-art quantum emulators employing techniques such as tensor networks, matrix product states (MPS), decision diagrams, and factorized ket based methods, running on CPU based hardware and focusing on effectively exact simulations. Performance is assessed on 13 benchmark circuits from the MQTBench library, spanning circuit sizes from 4 to 1,024 qubits. Our results reveal that MPS-based emulators outperform other approaches overall, successfully solving 8 benchmarks up to the maximum size of 1,024 qubits and 12 benchmarks up to at least 100 qubits in less than 5 minutes. We find evidence that all circuits except a random one can be simulated in polynomial time. This work demonstrates that quantum emulators can faithfully simulate a broad range of large and complex universal quantum circuits with high fidelity, far beyond the limits of statevector simulators and today’s quantum hardware.
In the effort to develop useful quantum computers, simulating quantum machines with conventional classical computing resources is a key capability. Such simulations will always face limits, preventing the emulation of quantum computers at substantial scale; however, by pushing the envelope through optimal choices of algorithms and hardware, the value of simulator tools can be maximized. This work reviews state-of-the-art numerical simulation methods, i.e., classical algorithms that emulate quantum computer evolution under specific operations. We focus on the mainstream state-vector and tensor-network paradigms, while briefly mentioning alternative methods. Moreover, we review the diverse applications of simulation across different facets of quantum computer development, including understanding the fundamental differences between quantum and classical computations, exploring algorithmic design for quantum advantage, predicting quantum processor performance at the design stage, and efficiently characterizing fabricated devices for rapid iterations. This review complements recent surveys of current tools and implementations; here, we aim to provide readers with an essential understanding of the theoretical basis of classical simulation methods, a detailed discussion of their advantages and limitations, and an overview of the demands and challenges arising from practical use cases.
To emulate a quantum computation on a classical computer i.e. the evolution of the unitary operations on the wave function of the particle in quantum mechanics, we have to perform unitary matrix and normalized vector multiplications in the high-level programming languages of Python, C++, Java, etc. Quantum Libraries already available perform the matrix-vector multiplication in the backend using the numpy libraries of Python like Qiskit or use a C++ wrapper to further optimize the runtime it as in Qiskit-Aer Simulators. Since a fully functioning fault-tolerant computer is decades away, it is in our best interest to design new quantum algorithms and develop accelerator test beds for Quantum Emulations. All the quantum computer operations can be emulated on a classical computer, with the only downside being that the matrix multiplications scale up as O (N3) in runtime. In contrast, the quantum computer scales it up as O (N2log2N), where N = 2n, where N is the matrix dimension, where n is the number of qubits, so the runtime for quantum emulations on the classical computer increases exponentially with increase in number of qubits and increases linearly with increase in number of depths, complexity wise. Though it is not possible to change the exponential index, it is possible to reduce the runtime for quantum emulations on classical computers by use of GPU and Alveo Accelerator Cards, and also code optimization on the software side like using a C++ wrapper. In this paper, we will benchmark the matrix-matrix multiplications on HPC Accelerator Cards varying the qubit size and the depth of the quantum circuit and provide a universal mathematical equation for the runtime on the GPU and Alveo Vector Cards for two variables of qubit size and quantum circuit depth. So a theoretical limit on qubit size and qubit depth exactly can be established for quantum emulations on present classical supercomputers.
Rapid advances in quantum computing technology lead to an increasing need for software simulators that enable both algorithm design and the validation of results obtained from quantum hardware. This includes calculations that aim at probing regimes of quantum advantage, where a quantum computer outperforms a classical computer in the same task. High performance computing (HPC) platforms play a crucial role as today’s quantum devices already reach beyond the limits of what powerful workstations can model, but a systematic evaluation of the individual performance of the many offered simulation packages is lacking so far. In this Technical Review, we benchmark several software packages capable of simulating quantum dynamics with a special focus on HPC capabilities. We develop a containerized toolchain for benchmarking a large set of simulation packages on a local HPC cluster using different parallelisation capabilities, and compare the performance and system size-scaling for three paradigmatic quantum computing tasks. Our results can help finding the right package for a given simulation task and lay the foundation for a systematic community effort to benchmark and validate upcoming versions of existing and also newly developed simulation packages.
Although, there have been considerable advances in quantum technology, a great scale quantum computer will not be available until about a few years. In the meantime, it requires quantum emulators which allow to study the existing quantum algorithms and the design of new ones. We propose a flexible method to emulate quantum circuits which reduces design and processing time. In this context, we propose a design framework that takes advantage of field-programmable gate array (FPGA) parallel processing technology in combination with high-level programming tools provided by Vivado. In order to show the design method working Quantum Fourier Transform (QFT) is implemented. Every step of the design is described and circuit performance is studied for different cases of input vector data sizes.