High-fidelity two qubit gate via single flux quantum pulses

Kangbo Li, R. McDermott, Maxim Vavilov

Maxime Lapointe-Major, Boyan T. Torosov, Bohdan Kulchytskyy +1 more

Maxime Lapointe-Major, Boyan Torosov, Bohdan Kulchytskyy +1 more

We present a gradient-based method to construct memory-efficient, high-fidelity, single-qubit gates for fluxonium qubits. These gates are constructed using a sequence of single-flux quantum (SFQ) pulses that are sent to the qubit through either capacitive or inductive coupling. The schedule of SFQ pulses is constructed with an on-ramp and an off-ramp applied prior to and after a pulse train, where the pulses are spaced at intervals equal to the qubit period. We reduce the optimization problem to the scheduling of a fixed number of SFQ pulses in the on-ramp and solve it by relaxing the discretization constraint of the SFQ clock as an intermediate step, allowing the use of the Broyden-Fletcher-Goldfarb-Shanno optimizer. Using this approach, gate fidelities of 99.99 % can be achieved for inductive coupling and 99.9 % for capacitive coupling, with leakage being the main source of coherent errors for both approaches.

Xiu–Hao Deng, Edwin Barnes, Sophia E. Economou

Ross Shillito, Florian Hopfmueller, Bohdan Kulchytskyy +1 more

In the traditional approach to controlling superconducting qubits using microwave pulses, the field of pulse shaping has emerged in order to assist in the removal of leakage and increase gate fidelity. However, the challenge of scaling microwave control electronics has created an opportunity to explore alternative methods such as single-flux quantum (SFQ) pulses. For qubits controlled by SFQ pulses, high fidelity gates can be achieved by optimizing the binary control sequence. We extend the notion of the derivative removal by adiabatic gate (DRAG) framework a transmon qubit controlled by SFQ drivers. The proposed implementation of SFQ pulse sequences can be stored in 22 bits or fewer, with gate fidelities exceeding 99.99%. This modest memory requirement could help reduce the footprint of the SFQ coprocessors and power dissipation while preserving their inherent advantages of scalability and cost-effectiveness.

Erik A. Lucero, M. Ansmann, Radoslaw C. Bialczak +7 more