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The Japan Society of Applied Physics

Demonstrations of SFQ logic gates by All-NbN integrated circuits (11.5)

Kazumasa Makise

Published Feb 13, 2013• 0 citations
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We have developed an all-NbN integrated circuit technology for future integration of single flux quantum (SFQ) circuit with superconducting single-photon detector array. The all-NbN integrated circuits consist of epitaxial NbN/AlN/NbN tunnel junctions fabricated on single-crystal MgO substrates, Mo shunt resistors and 500-nm-thick NbN ground plane on the top. Critical current density and sheet resistance of the Mo resistor were set at 2.5 kA/cm2and 1.2 Ω, respectively. Current uniformity of the NbN/AlN/NbN tunnel junctions was measured to be σ = 3% for 3 μm × 3 μm junction size. The NbN-based SFQ logic cells were designed for and tested at 4.2 K. We actually measured circuit inductances of the fabricated SFQ cells. Circuit simulation revealed that the measured circuit inductances in the fabricated SFQ cells should allow operating margins of more than +/-20%.

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Design and manufacturing of superconductive electronics have been evolving over the past three decades with significant progress made in related fields. Rapid single flux quantum (RSFQ) logic circuits have become popular among superconductive logic families and its energy-efficient variants (ERSFQ and eSFQ) have shown promise as an ultra lowpower and high-speed circuit fabric. SFQ circuits have been demonstrated at tens of GHz with an energy consumption of an attojoule per gate. There are many differences between SFQ and conventional CMOS circuits. SFQ logic circuits are based on the manipulation of the quantized magnetic flux pulses. Most of the logic gates are sequential in nature requiring the clock to be distributed to every logic gate. SFQ logic gates have no gain and hence splitters are needed to drive multiple fanouts. Design and successful demonstration of a controllable superconducting switch and a compact reliable memory element have evaded researchers so far. This paper starts by describing key differences between SFQ logic and conventional CMOS and concludes by listing key challenges that must be overcome to achieve the very large scale integration of SFQ circuits and make the demonstration of a superconductive CPU a reality.

Design, Automation, and Test in Europe•Mar 1, 2019•11 citations
We have developed an all-NbN integrated circuit technology for future integration of single flux quantum (SFQ) circuit with superconducting single-photon detector array. The all-NbN integrated circuits consist of epitaxial NbN/AlN/NbN tunnel junctions fabricated on single-crystal MgO substrates, Mo shunt resistors and 500-nm-thick NbN ground plane on the top. Critical current density and sheet resistance of the Mo resistor were set at 2.5 kA/cm2and 1.2 Ω, respectively. Current uniformity of the NbN/AlN/NbN tunnel junctions was measured to be σ = 3% for 3 μm × 3 μm junction size. The NbN-based SFQ logic cells were designed for and tested at 4.2 K. We actually measured circuit inductances of the fabricated SFQ cells. Circuit simulation revealed that the measured circuit inductances in the fabricated SFQ cells should allow operating margins of more than +/-20%.
We developed NbN-based SFQ circuits consisting of high-quality epitaxial NbN/AlN/NbN trilayer grown on MgO (100) substrate. The SFQ logic cells such as JTL, DC/SFQ converter, voltage driver, pulse splitter, TFF, and CB were designed by setting the critical current density JCat 2.5 kA/cm2. We succeeded in demonstrating correct operations of all the designed SFQ cells, but the JCrange allowing the operation was quite narrow as around 70% for the designed value. The circuit simulation revealed that the TFF cell requires the JCrange from 65% to 115% for the correct operation, while the DC/SFQ converter was not operational for the JCof more than 70%.
Design and manufacturing of superconductive electronics have been evolving over the past three decades with significant progress made in related fields. Rapid single flux quantum (RSFQ) logic circuits have become popular among superconductive logic families and its energy-efficient variants (ERSFQ and eSFQ) have shown promise as an ultra lowpower and high-speed circuit fabric. SFQ circuits have been demonstrated at tens of GHz with an energy consumption of an attojoule per gate. There are many differences between SFQ and conventional CMOS circuits. SFQ logic circuits are based on the manipulation of the quantized magnetic flux pulses. Most of the logic gates are sequential in nature requiring the clock to be distributed to every logic gate. SFQ logic gates have no gain and hence splitters are needed to drive multiple fanouts. Design and successful demonstration of a controllable superconducting switch and a compact reliable memory element have evaded researchers so far. This paper starts by describing key differences between SFQ logic and conventional CMOS and concludes by listing key challenges that must be overcome to achieve the very large scale integration of SFQ circuits and make the demonstration of a superconductive CPU a reality.