We present the latest development of an Nb/Al-AlOx/Nb Josephson junction fabrication process for superconducting integrated circuits at SIMIT. Our fabrication process has four niobium superconducting layers and one Ti/Pd resistor layer with 1.0 Ω/square sheet resistor for junction shunting and circuit biasing. Critical current density Jcof the junctions is controlled from 30 A/cm2to 10 kA/cm2by exposing aluminum layer to pure or mixed O2atmosphere. Correlation between measured Jcand exposure conditions has been established. Average quality factor (Rsg/Rn) of the junctions in our process is larger than 20 with subgap leakage factor (Vm) beyond 30 mV. Critical current uniformity is obtained according to the switching current (Is) distribution of a 1000-JJ array. Measured standard deviation sigma of Isis less than 4% over the 100-mm wafer. Plasma resonance in a large Josephson junction is used to measure specific capacitance (Cs) of the junction. Sheet inductances of superconducting niobium strip-lines are extracted by a SQUID diagnose circuit and the measured results show good agreement with our design values.
We present the latest development of an Nb/Al-AlOx/Nb Josephson junction fabrication process for superconducting integrated circuits at SIMIT. Our fabrication process has four niobium superconducting layers and one Ti/Pd resistor layer with 1.0 Ω/square sheet resistor for junction shunting and circuit biasing. Critical current density Jcof the junctions is controlled from 30 A/cm2to 10 kA/cm2by exposing aluminum layer to pure or mixed O2atmosphere. Correlation between measured Jcand exposure conditions has been established. Average quality factor (Rsg/Rn) of the junctions in our process is larger than 20 with subgap leakage factor (Vm) beyond 30 mV. Critical current uniformity is obtained according to the switching current (Is) distribution of a 1000-JJ array. Measured standard deviation sigma of Isis less than 4% over the 100-mm wafer. Plasma resonance in a large Josephson junction is used to measure specific capacitance (Cs) of the junction. Sheet inductances of superconducting niobium strip-lines are extracted by a SQUID diagnose circuit and the measured results show good agreement with our design values.
We have developed a fabrication technology for superconducting integrated circuits with Nb-based Josephson junctions. The standard fabrication process with 10 mask levels includes 3 Nb superconducting layers and a Mo resistor layer. The influence of deposition parameters on film stress, electrical properties, and surface roughness were studied systematically. High quality Nb, Al, Mo, and SiO2films were successfully deposited for the subsequent fabrication of circuits. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistanceRshof 2 Ω, followed by the deposition of Nb/Al-AlOx/Nb trilayer Josephson-junction. The target critical current densityJcwas set at 6 kA/cm2. Small-scale circuits such as our standard library cells have been successfully fabricated and tested, confirming the capability of our fabrication technology for superconducting integrated circuits.
Development of 15kA/cm2 Fabrication Process for Superconducting Integrated Digital Circuits
A new fabrication process for superconducting integrated digital circuits is reported. We have developed the "SIMIT Nb04" fabrication technique for superconducting integrated circuits with Nb-based Josephson junctions based on the validated "SIMIT Nb03" process and Chemical Mechanical Planarization (CMP) technology. Seven Nb superconducting layers and one Mo resistor layer are included in the "SIMIT Nb04" process with 19 mask levels. The device structure is composed of active layers including junctions at the bottom, two passive transmission line (PTL) layers in the middle and a DC power layer at the top. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance Rsh of 3 Ω, followed by the deposition of Nb/Al-AlOx/Nb trilayer Josephson-junction with a target critical current density Jc at 15 kA/cm2. To increase the Al-AlOx barrier layer etching's repeatability, an additional barrier protection layer was applied. To accomplish high-quality planarization, we created a planarization procedure coupled with dummy filling. To assess the process dependability and controllability, a set of process control monitors (PCMs) for monitoring fabrication and design parameters was designed and monitored. The successful manufacturing and testing of a few small-scale circuits, like our standard library cells, further attests to the viability of our fabrication process for superconducting integrated circuits.
NbN/MgO/NbN tunnel junction fabrication has been developed using statistical experimental design for insertion into a Josephson LSI (large-scale integration) fabrication technology. Junction deposition conditions have been studied and correlated with structural characterization and junction I-V measurements. Josephson junctions with sum gaps as large as 5.0 mV and junction quality factor of 47 mV have been produced. Current density uniformity, a critical parameter in circuit design, has also been investigated. I/sub c/(O) uniformity at 4.2 K of a 4000 junction array was within sigma =3.1% and was +or-10% across 1 in/sup 2/. The utility of this junction process has been demonstrated by insertion into a standard circuit fabrication process that has produced logic circuit operation above 10 K.>
We investigated current-voltage characteristics of unshunted and externally shunted Josephson junctions (JJs) with high critical current densities Jcin order to extract their basic parameters and statistical characteristics for JJ modeling in superconducting integrated circuits as well as to assess their potential for future technology nodes. Nb/AlOx-Al/Nb junctions with diameters from 0.5 to 6 μm were fabricated using a fully planarized process with Mo or MoNxthin-film shunt resistors with sheet resistance Rsq= 2 Ω/sq and Rsq= 6 Ω/sq, respectively. We used our current standard MIT Lincoln Laboratory process node SFQ5ee to fabricate JJs with Jc= 0.1 mA/μm2and our new process node SFQ5hs (where “hs” stands for high speed) to make JJs with Jc= 0.2 mA/μm2and higher current densities up to about 1 mA/μm2. Using LRC resonance features on the I-V characteristics of shunted JJs, we extract the inductance associated with Mo shunt resistors of 1.4 pH/sq. The main part of this inductance, about 1.1 pH/sq, is the inductance of the 40-nm Mo resistor film, while the geometrical inductance of superconducting Nb wiring contributes the rest. We attribute this large inductance to “kinetic” inductance arising from the complex conductivity of a thin normal-metal film in an electromagnetic field with angular frequency ω, σ(ω) = σ0/(1 + iωτ), where σ0is the static conductivity and r the electron scattering time. Using a resonance in a large-area unshunted high-Jcjunction excited by a resistively coupled small-area shunted JJ, we extract the Josephson plasma frequency and specific capacitance of high-Jcjunctions in 0.1-1 mA/μm2Jcrange. We also present data on Jctargeting and JJ critical current spreads. We discuss the potential of using 0.2-mA/μm2JJs in very large scale integration single flux quantum circuits and 0.5-mA/μm2JJs in high-density integrated circuits without shunt resistors.
Niobium/aluminum-oxide/niobium Josephson tunnel junctions have been fabricated using electron beam evaporation to form all-metal films in a high vacuum system. A quality factor, V m (the product of the maximum dc Josephson current and the subgap resistance defined at 2 mV) between 36–37 mV, has been obtained for the best junctions of a 6 nm-thick Al layer by cooling down the surface of the base electrode for 100 minutes under a high background pressure, before the deposition of aluminum, after the formation of the base niobium electrode. An array of 80 series-connected junctions has also been fabricated using the selective niobium anodization process and the planarization process. The current-voltage characteristics of the array showed a standard deviation of the maximum dc Josephson current of 3.3%.
Using a fully automated cryogenic wafer prober, we measured superconductor fabrication process control monitors and simple integrated circuits on 200 mm wafers at 4.2 K, including Nb/Al-AlOx/Nb Josephson junctions, SQUID-based circuits for measuring inductors, test structures for measuring critical current of superconducting wires and vias, resistors, etc., to demonstrate the feasibility of using the system for characterizing niobium superconducting devices and integrated circuits on a wafer scale. The data on the wafer-scale distributions of the junction tunnel resistance, energy gap, inductance of Nb layers, critical currents of interlayer vias are presented. The wafers were fabricated in the SFQ5ee process, the fully planarized process with eight niobium layers and a layer of kinetic inductors, developed for superconductor electronics at MIT Lincoln Laboratory. The cryogenic wafer prober was developed at HPD/ FormFactor, Inc.