Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

APS March Meeting: Accurate Z rotations with less magic.

Andrew J. Landahl, Chris Cesare

Published Mar 1, 2013• 0 citations
OpenAlex

Abstract

The quantum Fourier transform Ubiquitous in quantum algorithms If native gates have error ε, how many instructions (gates, preparations, measurements) does it take to create a synthetic Z k gate whose error is ε' << ε? N.B.: Z 2 = T, Z 1 = S.Accurate quantum Z rotations with less magic.

Related papers

arXiv: Complex instruction set computing architecture for performing accurate quantum Z rotations with less magic.

Andrew J. Landahl, Chris Cesare

•Feb 1, 2013•0 citations

Accurate quantum Z rotations with less magic

Andrew J. Landahl, Chis Cesare

Bulletin of the American Physical Society•Mar 20, 2013•0 citations

Complex instruction set computing architecture for performing accurate quantum $Z$ rotations with less magic

Andrew J. Landahl, Chris Cesare

We present quantum protocols for executing arbitrarily accurate $π/2^k$ rotations of a qubit about its $Z$ axis. Reduced instruction set computing (\textsc{risc}) architectures typically restrict the instruction set to stabilizer operations and a single non-stabilizer operation, such as preparation of a "magic" state from which $T = Z(π/4)$ gates can be teleported. Although the overhead required to distill high-fidelity copies of this magic state is high, the subsequent quantum compiling overhead to realize $Z$ rotations in a \textsc{risc} architecture can be much greater. We develop a complex instruction set computing (\textsc{cisc}) architecture whose instruction set includes stabilizer operations and preparation of magic states from which $Z(π/2^k)$ gates can be teleported, for $2 \leq k \leq k_{\text{max}}$. This results in a substantial overall reduction in the number of gates required to achieve a desired gate accuracy for $Z$ rotations. The key to our construction is a family of shortened quantum Reed-Muller codes of length $2^{k+2}-1$, whose magic-state distillation threshold shrinks with $k$ but is greater than 0.85% for $k \leq 6$.

arXiv:1302.3240•Feb 13, 2013•25 citations

Time complexity and gate complexity of the quantum Fourier transform

Oussama Houhou, H. Aissaoui, H. Bougroura

AIP conference proceedings•Jan 1, 2012•1 citation

Parity-unfolded distillation architecture for noise-biased platforms

Konstantin Tiurev, Christoph Fleckenstein, Christophe Goeller +6 more

We introduce the parity-unfolded architecture, a fault-tolerant quantum computing scheme that relies on direct preparation and teleportation of small-angle rotations $ Z^{1/2^{k}}$ rather than approximating them with the conventional (Clifford + $T$) gate set. The architecture is enabled by efficient distillation of gates from an arbitrary level of the Clifford hierarchy, which we refer to as parity unfolding. With it, a state $|Z_k\rangle = Z^{1/2^{k}}|{+}\rangle$ can be prepared fault-tolerantly using $2^{k+3} + O(2^{k/2})$ biased-noise qubits on a planar chip with nearest-neighbour connectivity. For algorithms requiring native $Z^{1/2^{k}}$ gates, such as the Quantum Fourier Transform and phase estimation, the proposed scheme allows to reduce resource overheads for up to $k=7$, i.e., up to $T^{1/32}$. Furthermore, when used for the synthesis of arbitrary small-angle rotations, parity-unfolded distillation of ($T$ + $\sqrt{T}$) reduces the minimum achievable logical error rate by 43% while cutting the resource requirements by 26%, when compared to unfolded distillation of only the $T$ gate.

quant-pharXiv:2604.15436•Apr 20, 2026•0 citations

Quantum compiling with a variational instruction set for accurate and fast quantum computing

Ying Lu, Peng-Fei Zhou, Shao-Ming Fei +1 more

The quantum instruction set (QIS) is defined as the quantum gates that are physically realizable by controlling the qubits in quantum hardware. Compiling quantum circuits into the product of the gates in a properly defined QIS is a fundamental step in quantum computing. We here propose the quantum variational instruction set (QuVIS) formed by flexibly designed multiqubit gates for higher speed and accuracy of quantum computing. The controlling of qubits for realizing the gates in a QuVIS is variationally achieved using the fine-grained time optimization algorithm. Significant reductions in both the error accumulation and time cost are demonstrated in realizing the swaps of multiple qubits and quantum Fourier transformations, compared with the compiling by a standard QIS such as the quantum microinstruction set (QuMIS, formed by several one- and two-qubit gates including one-qubit rotations and controlled-not gates). With the same requirement on quantum hardware, the time cost for QuVIS is reduced to less than one-half of that for QuMIS. Simultaneously, the error is suppressed algebraically as the depth of the compiled circuit is reduced. As a general compiling approach with high flexibility and efficiency, QuVIS can be defined for different quantum circuits and be adapted to the quantum hardware with different interactions.

arXiv:2203.15574•Physical Review Research•May 12, 2023•3 citations
Complex instruction set computing architecture for performing accurate quantum ZZZ rotations with less magic
We present quantum protocols for executing arbitrarily accurate π/2kπ/2^kπ/2k rotations of a qubit about its ZZZ axis. Reduced instruction set computing (\textsc{risc}) architectures typically restrict the instruction set to stabilizer operations and a single non-stabilizer operation, such as preparation of a "magic" state from which T=Z(π/4)T = Z(π/4)T=Z(π/4) gates can be teleported. Although the overhead required to distill high-fidelity copies of this magic state is high, the subsequent quantum compiling overhead to realize ZZZ rotations in a \textsc{risc} architecture can be much greater. We develop a complex instruction set computing (\textsc{cisc}) architecture whose instruction set includes stabilizer operations and preparation of magic states from which Z(π/2k)Z(π/2^k)Z(π/2k) gates can be teleported, for 2≤k≤kmax2 \leq k \leq k_{\text{max}}2≤k≤kmax​. This results in a substantial overall reduction in the number of gates required to achieve a desired gate accuracy for ZZZ rotations. The key to our construction is a family of shortened quantum Reed-Muller codes of length 2k+2−12^{k+2}-12k+2−1, whose magic-state distillation threshold shrinks with kkk but is greater than 0.85% for k≤6k \leq 6k≤6.
We introduce the parity-unfolded architecture, a fault-tolerant quantum computing scheme that relies on direct preparation and teleportation of small-angle rotations $ Z^{1/2^{k}}$ rather than approximating them with the conventional (Clifford + TTT) gate set. The architecture is enabled by efficient distillation of gates from an arbitrary level of the Clifford hierarchy, which we refer to as parity unfolding. With it, a state ∣Zk⟩=Z1/2k∣+⟩|Z_k\rangle = Z^{1/2^{k}}|{+}\rangle∣Zk​⟩=Z1/2k∣+⟩ can be prepared fault-tolerantly using 2k+3+O(2k/2)2^{k+3} + O(2^{k/2})2k+3+O(2k/2) biased-noise qubits on a planar chip with nearest-neighbour connectivity. For algorithms requiring native Z1/2kZ^{1/2^{k}}Z1/2k gates, such as the Quantum Fourier Transform and phase estimation, the proposed scheme allows to reduce resource overheads for up to k=7k=7k=7, i.e., up to T1/32T^{1/32}T1/32. Furthermore, when used for the synthesis of arbitrary small-angle rotations, parity-unfolded distillation of (TTT + T\sqrt{T}T​) reduces the minimum achievable logical error rate by 43% while cutting the resource requirements by 26%, when compared to unfolded distillation of only the TTT gate.
The quantum instruction set (QIS) is defined as the quantum gates that are physically realizable by controlling the qubits in quantum hardware. Compiling quantum circuits into the product of the gates in a properly defined QIS is a fundamental step in quantum computing. We here propose the quantum variational instruction set (QuVIS) formed by flexibly designed multiqubit gates for higher speed and accuracy of quantum computing. The controlling of qubits for realizing the gates in a QuVIS is variationally achieved using the fine-grained time optimization algorithm. Significant reductions in both the error accumulation and time cost are demonstrated in realizing the swaps of multiple qubits and quantum Fourier transformations, compared with the compiling by a standard QIS such as the quantum microinstruction set (QuMIS, formed by several one- and two-qubit gates including one-qubit rotations and controlled-not gates). With the same requirement on quantum hardware, the time cost for QuVIS is reduced to less than one-half of that for QuMIS. Simultaneously, the error is suppressed algebraically as the depth of the compiled circuit is reduced. As a general compiling approach with high flexibility and efficiency, QuVIS can be defined for different quantum circuits and be adapted to the quantum hardware with different interactions.