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QUANTUM REALIZATION OF TERNARY ADDER CIRCUITS

Mozammel H. A. Khan

Published Jan 1, 2004• 13 citations
OpenAlex

Abstract

Ternary quantum circuits have recently been introduced to realize ternary logic functions. In this paper realizations of ternary half- and full-adder circuits using generalized ternary gates (GTG) are proposed, which are more efficient than the previously published realizations.

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The ternary quantum circuit is very useful in arithmetic and logic operations. This circuit has several advantages as it reduces power dissipation, step time, etc. Adder circuit is the main block of various computing units and for several other complex computer designs. In this current paper, we have used generalized ternary gate (GTG) and reversible gates for the synthesis of reversible half adder and a full adder circuits. The presented designs offer reduced constant inputs and less quantum cost, compared to existing designs. Our proposed design allows a reduction of 40% of the cost and 25% of the number of gates used.
Synthesis of ternary quantum circuits involves basic ternary gates and logic operations in the ternary quantum domain. Works that define ternary algebra and their applications for ternary quantum logic realization, are very few. In this paper, we express a ternary logic function in terms of projection operations including a new one. We demonstrate how to realize a few new multi-qutrit ternary gates in terms of generalized ternary gates and projection operations. We then employ our synthesis method to design ternary adder circuits which have better cost than that obtained by earlier method.
Ternary quantum circuits play a significant role in future quantum computing technology because they have many advantages over binary quantum circuits. Subtraction is considered as being one of the key arithmetic operations; hence, subtractors are very essential for the construction of various computational units of quantum computers and other complex computational systems. In this paper, we have proposed the realization of a quantum reversible ternary half-subtractor circuit using a generalized ternary gate, a ternary Toffoli gate, and a ternary C2NOT gate. Based on the realization of the ternary half-subtractor, we proposed the realization of a ternary full-subtractor.
Ternary quantum logic plays a very important role for building high speed and efficient futuristic computers. It has several advantages over classical computing and binary quantum circuits. In this paper, the realization of basic ternary circuits for adder/subtractor, encoder and priority encoder are proposed and designed. These circuits are very essential for the construction of various computational units of quantum computers and other complex computational systems. Design of reversible circuits can be improved by reducing the quantum circuit cost. This paper uses some elementary components and typical ternary gates (generalized ternary gate, M-S gate etc.) to perform arithmetic addition, subtraction and encoding operations. Finally, it evaluates the optimum cost for each circuit.