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Advances in Electrical and Computer Engineering

Genetic Synthesis of New Reversible/Quantum Ternary Comparator

V. G. Deı̆buk, Andrij V. Biloshytskyi

Published Jan 1, 2015• 12 citations
Publisher

Abstract

Methods of quantum/reversible logic synthesis are based on the use of the binary nature of quantum computing. However, multiple-valued logic is a promising choice for future quantum computer technology due to a number of advantages over binary circuits. In this paper we have developed a synthesis of ternary reversible circuits based on Muthukrishnan-Stroud gates using a genetic algorithm. The method of coding chromosome is presented, and well-grounded choice of algorithm parameters allowed obtaining better circuit schemes of one- and n-qutrit ternary comparators compared with other methods. These parameters are quantum cost of received reversible devices, delay time and number of constant input (ancilla) lines. Proposed implementation of the genetic algorithm has led to reducing of the device delay time and the number of ancilla qutrits to 1 and 2n-1 for one- and n-qutrits full comparators, respectively. For designing of n-qutrit comparator we have introduced a complementary device which compares output functions of 1-qutrit comparators.

DOI
10.4316/aece.2015.03021

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Methods of quantum/reversible logic synthesis are based on the use of the binary nature of quantum computing. However, multiple-valued logic is a promising choice for future quantum computer technology due to a number of advantages over binary circuits. In this paper we have developed a synthesis of ternary reversible circuits based on Muthukrishnan-Stroud gates using a genetic algorithm. The method of coding chromosome is presented, and well-grounded choice of algorithm parameters allowed obtaining better circuit schemes of one- and n-qutrit ternary comparators compared with other methods. These parameters are quantum cost of received reversible devices, delay time and number of constant input (ancilla) lines. Proposed implementation of the genetic algorithm has led to reducing of the device delay time and the number of ancilla qutrits to 1 and 2n-1 for one- and n-qutrits full comparators, respectively. For designing of n-qutrit comparator we have introduced a complementary device which compares output functions of 1-qutrit comparators.
Multiple-valued logic is a promising choice for future computer technologies, which provides a set of advantages comparing to binary circuits. In this paper, we have developed a genetic algorithm-based synthesis of ternary reversible circuits using Muthukrishnan-Stroud gates. The method for chromosomes coding, as well as a reasonable choice of algorithm parameters, allowed obtaining circuits for ternary Toffoli and modified Fredkin gates, which are better than other published methods in terms of quantum cost, delay times and amount of input ancillary and output garbage qutrits.
Typical methods of quantum/reversible synthesis are based on using the binary character of quantum computing.However, multi-valued logic is a promising choice for future computer technologies, given a set of advantages when comparing to binary circuits.In this work, we have developed a genetic algorithm-based synthesis of ternary reversible circuits using Muthukrishnan-Stroud gates.The method for chromosomes coding that we present, as well as a judicious choice of algorithm parameters, allowed obtaining circuits for half-adder and full adder which are better than other published methods in terms of cost, delay times and amount of input ancillary bits.A structure of the circuits is analyzed in details, based on their decomposition.
Multiple-valued logic is a promising choice for future computer technologies, which provides a set of advantages comparing to binary circuits. We have developed an adaptive genetic algorithm for ternary reversible circuits using Muthukrishnan-Stroud gates. The method for chromosomes coding, as well as a reasonable choice of algorithm parameters, allowed obtaining circuits for ternary arithmetic devices, which are better than other known methods in terms of quantum cost, delay time and amount of input ancillary and output garbage qutrits. Based on our realization of ternary parallel full-adder we synthesized reversible ternary parallel adder/subtractor, which has better parameters over the previously reported devices.
Abstract—Multiple-valued quantum circuits are promising choices for future quantum computing technology, since the multiple-valued quantum system is more compact than the corresponding binary quantum system. Grover’s quantum search algorithm requires a sub-circuit called oracle, which takes a set of inputs and gives an output stating whether a given search condition on the inputs is satisfied or not. Equality, less-than, and greater-than comparisons are widely used as search conditions. In this paper, we show design of quantum ternary equality, less-than, and greater-than comparators on the top of ion-trap realizable 1-qutrit gates and 2-qutrit Muthukrishnan-Stroud gates. Index Terms—Multiple-valued logic, quantum logic, reversible logic, ternary comparators, ternary logic I.
Reversible logic is fundamental to quantum circuit design, as quantum operations are inherently information-preserving and reversible. While most quantum synthesis methods rely on binary logic, quaternary reversible computing can increase data density, reduce circuit width, and potentially lead to more efficient realizations. We introduce a genetic-algorithm-based approach for designing compact quaternary reversible comparator circuits, which are important components in quantum architectures. This technique utilizes a gate library based on extended Shift and Muthukrishnan–Stroud gates tailored to quaternary systems. Chromosomes encode sequences of quaternary gates, and evolutionary operators search for configurations with minimal quantum cost. Although demonstrated on comparator circuits, the approach applies to any quaternary reversible circuit defined by its truth table. The synthesis process occurs in two phases: candidate circuits first evolve toward correct behavior; then correct circuits are optimized to obtain compact implementations. We evaluate the approach on comparators performing lower-than, greater-than, and equality operations, as well as on a 1-qudit full comparator. The method achieves average quantum cost improvements of about 30% for restoring and 58% for non-restoring configurations compared to existing designs. These reductions support more efficient and more error-resilient quantum circuits, showing that this approach is a strong candidate for quaternary quantum systems.