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Journal of Communications

Improved multi-bits flipping algorithm for high-speed LDPC decoding

MA Ke-xian

Published Jan 1, 2014• 0 citations
OpenAlex

Abstract

In order to improve the decoding speed of the RRWBF algorithm, a multiple-bits selection mechanism was proposed to accelerate the decoding convergence speed of the RRWBF algorithm. However, the RRWBF algorithm with the multiple-bits selection mechanism will appear the bit-repeated flipping, which can impair the decoding performance of the RRWBF algorithm. Hence, a bit-repeated flipping elimination mechanism was proposed to reduce the bit-repeated flipping in the process of the multiple-bits flipping decoding. Simulation results show that the RRWBF algorithm with the multiple-bits selection and the repeated flipping elimination mechanism has a much faster decoding speed at the cost of a little decoding performance loss compared with the RRWBF algorithm.

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In order to improve the decoding speed of the RRWBF algorithm, a multiple-bits selection mechanism was proposed to accelerate the decoding convergence speed of the RRWBF algorithm. However, the RRWBF algorithm with the multiple-bits selection mechanism will appear the bit-repeated flipping, which can impair the decoding performance of the RRWBF algorithm. Hence, a bit-repeated flipping elimination mechanism was proposed to reduce the bit-repeated flipping in the process of the multiple-bits flipping decoding. Simulation results show that the RRWBF algorithm with the multiple-bits selection and the repeated flipping elimination mechanism has a much faster decoding speed at the cost of a little decoding performance loss compared with the RRWBF algorithm.
A modified method for general LDPC bit-flipping decoding is proposed in this paper. The proposed method consists of two parts: multi-bit flipping judgement algorithm and multi-bit flipping compensation algorithm, the first part trying to find the maximum acceptable number of bits to flipping at the same time to accelerated convergence process, and the second part to compensates the new errors introduced by the first part. The proposed decoding method can be easily used to modify different BF algorithms which means the hardware implementation is simple. The simulation results show that the proposed method can achieve 2.75% to 36.05% of bit-flipping timing reduction, 3.0% to 18.1% of BER reduction at SNR 0.2dB to 4dB compared with classic BF, IMWBF, LCWBF, and RRWBF.
It was recently shown that the reliability ratio based bit-flipping (RRWBF) decoding algorithm for low-density parity-check (LDPC) codes performs best among existing bit-flipping-based algorithms. A new version of this algorithm is proposed such that decoding time is significantly reduced, especially when the iteration number is small and the code length is large. Simulation results showed the proposed version has up to 2322.39%, 823.90%, 511.79%, and 261.92% speedup compared to the original algorithm on a UNIX workstation for 10, 30, 50, and 100 iterations. It is thus much more efficient to adopt this version for simulation and hardware implementation. Moreover, this version of the RRWBF algorithm provides a more intuitive way of interpreting its superior performance over other bit-flipping-based algorithms.
The reliability ratio weighted based bit-flipping (RRWBF) algorithm for decoding low-density parity-check (LDPC) codes has recently been developed to provide the best performance among all existing bit-flipping based algorithms. The implementation efficient reliability ratio weighted based bit-flipping (IERRWBF) algorithm speedup the original algorithm to decrease the processing time used. A drawback for this algorithm is the decrease in the improvement as the maximum number of iterations assigned for the algorithm increase as a large percentage of decoding time is spent on the iteration part without any change in the performance. In this paper, a modified version for this algorithm is proposed to solve this drawback by reducing the number of iterations required to achieve the same performance of the existing IERRWBF algorithm using efficient number of iterations instead of using the maximum number of iterations for decoding without any change in the performance of the IERRWBF.
Because of the speed limitation of the conventional bit-selection strategy in the existing weighted bit flipping algorithms, a high-speed Low-Density Parity-Check (LDPC) decoder cannot be realised. To solve this problem, we propose a fast weighted bit flipping algorithm. Specifically, based on the identically distributed error bits, a parallel bit-selection method is proposed to reduce the selection delay of the flipped bits. The delay analysis demonstrates that, the decoding speed of LDPC codes can be significantly improved by the proposed algorithm. Furthermore, simulation results verify the validity of the proposed algorithm.
In this paper, a weighted multiple bit flipping (WMBF) algorithman for decoding low-density parity-check (LDPC) codes is proposed first. Then the improved WMBF algorithm which we call the efficient weighted bit-flipping (EWBF) algorithm is developed. The EWBF algorithm can dynamically choose either multiple bit-flipping or single bit-flipping in each iteration according to the log-likelihood ratio of the error probability of the received bits. Thus, it can efficiently increase the convergence speed of decoding and prevent the decoding process from falling into loop traps. Compared with the parallel weighted bit-flipping (PWBF) algorithm, the EWBF algorithm can achieve significantly lower computational complexity without performance degradation when the Euclidean geometry (EG)-LDPC codes are decoded. Furthermore, the flipping criterion does not require any parameter adjustment.