Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Decoding of low-density parity-check codes based on noise soft-decision over finite-state Markov channels

He-Qin Zhou

Published Jan 1, 2006• 0 citations
OpenAlex

Abstract

An improved decoding algorithm for low-density parity-check code(LDPC) on finite-state Markov channels was presented and the corresponding factor graph representation was given.It consists of two parts: standard sum-product algorithm(SPA) for LDPC and forward-backward(FB) algorithm for Markov channel.After each iteration for SPA,FB re-estimated the channel likelihood ratio for the next iteration of SPA based on soft decisions for noise bits from SPA.Considering more cycles in the factor graph with the introduction of the Markov channel node,the probabilistic schedule was used to update the message during the iterations for decoding.Simulation results show that the algorithm not only performs much better than the standard sum-product algorithm,but also outperforms the algorithm based on hard decisions for noise bits.

Related papers

Non-uniform quantization scheme for the decoding of low-density parity-check codes with the sum-product algorithm

Xinru Qu, Liuguo Yin

In this paper, a non-uniform quantization scheme is proposed for the decoding of Low-Density Parity-Check (LDPC) codes with the Sum-Product Algorithm (SPA). With the proposed scheme, the quantization-range and quantization-interval for the soft Log-Likelihood-Ratio (LLR) values of the decoder input, the variable nodes, and the check nodes are set separately, and are also adjusted according to the evolution of the probability density distribution of the LLR values in the iterative decoding procedure to minimize the difference between the decoding values before quantization and that after quantization. Simulation results show that decoding with 3-bit non-uniform quantization of the proposed scheme may obtain a BER performance slightly better than that of decoding with 6-bits quantization of the traditional uniform quantization method.

IEEE International Conference on Electronics Information and Emergency Communication•Jun 1, 2016•5 citations

A multistage scheduled decoder for short block length low-density parity-check codes

Nazanin Elhami-Khorasani

Recent advances in coding theory have uncovered the previously forgotten power of Low-Density Parity-Check (LDPC) codes. Their popularity can be related to their relatively simple iterative decoders and their potential to achieve high performance close to shannon limit. These make them an attractive candidate for error correcting application in communication systems. In this thesis, we focus our research on the iterative decoding algorithms for Low-Density Parity-Check codes and present an improved decoding algorithm. First, the graph structure of LDPC codes is studied and a graph-based search algorithm to find the shortest closed walk and shortest cycle for each node of the graph is proposed. Then, the Deterministic schedule is applied on nodes of the graph with the objective of preserving the optimality of the algorithms. Finally, Hybrid Switch-Type technique is applied on the improved algorithms to provide a desirable complexity/performance trade-off. Hybrid Technique and Deterministic schedule are combined for decoding regular and irregular LDPC codes. The performance and complexity of the decoder is studied for Sum-Product and Gallager A algorithms. The result is a flexible decoder for any available LDPC code and any combination of decoding algorithms based on the communication systems need. In this technique, we benefit the high performance of soft-decision algorithms and low complexity of hard-decision algorithms by changing the decoding rule after a few iterations. Hence, a desirable performance can be obtained with less average number of soft iterations. Moreover, all the nodes do not update messages in each iteration. As a result, the total number of computations is reduced considerably

•Jan 1, 2007•0 citations

Efficient Difference-based Decoding Implementations of LDPC Codes

Zhanji Wu, Peng Mugen, Wang Wenbo +1 more

Efficient implementations of the sum-product algorithm (SPA) for decoding low-density parity-check (LDPC) codes using difference-based messages between bit nodes and check nodes are presented. As for the updates of check nodes, reduced- complexity derivatives are also put forward. As compared with the traditional Log-Likelihood-Ratio(LLR)-based decoding implementations, the proposed method has much lower complexity and latency, while it has no obvious loss of the error performance.

IEEE Communications Letters•May 1, 2008•3 citations

Difference to sum ratio factor based min-sum decoding for Low Density Parity Check Codes

Mohammad Rakibul Islam, Khandaker Sultan Mahmood, Md. Moshiur Rahman Farazi +3 more

Low Density Parity Check Codes (LDPC) give groundbreaking performance which is known to approach Shannon's limits for sufficiently large block length. Historically and recently, LDPC have been known to give superior performance than concatenated coding. In the following paper, a proposal to modify the standard Min-Sum (MS) algorithm for decoding LDPC codes is presented. This is done by introduction of a difference to sum ratio factor, κ in the check to bit node updating process. The algorithm is further extended by implementing hard decision of the Bit-Flipping (BF) algorithm over the soft decision of MS algorithm. Simulation results demonstrate that the proposed algorithms are effective in imparting a better performance in terms of a lower bit error rate (BER) at medium to high signal to noise ratio (SNR) when compared to the traditional MS algorithm while adding fair amount of complexity.

Computing, Communications and IoT Applications (ComComAp)•Jan 1, 2012•1 citation

A Relaxed Half-Stochastic Iterative Decoder for LDPC Codes

François Leduc-Primeau, Saied Hemati, Warren J. Gross +1 more

This paper presents a Relaxed Half-Stochastic (RHS) low-density parity-check (LDPC) decoding algorithm that uses some elements of the sum-product algorithm (SPA) in its variable nodes, but maintains the low-complexity interleaver and check node structures characteristic of stochastic decoders. The algorithm relies on the principle of successive relaxation to convert binary stochastic streams to a log-likelihood ratio (LLR) representation. Simulations of a (2048, 1723) RS-LDPC code show that the RHS algorithm can outperform 100-iterations floating-point SPA decoding. We describe approaches for low-complexity implementation of the RHS algorithm. Furthermore, we show how the stochastic nature of the belief representation can be exploited to lower the error floor.

Globecom•Nov 1, 2009•20 citations

Constructing and Decoding of LDPC Codes Based on Factor Graphs

Liang Zhao

Low Density Parity Check(LDPC) Codes are a kind of linear block codes approaching Shannon limit. They can be constructed either with spare parity-check matrix or with factor graphs. According to various constructing methods of the codes,several decoding algorithms have been proposed so far. In this paper the constructing method of LDPC codes based on factor graph is introduced at the beginning, then the sum-product decoding algorithm(SPA) is analyzed. Finally the decoding process of LDPC based on SPA algorithm is discussed.

Telecommunication Engineering•Jan 1, 2004•0 citations
An improved decoding algorithm for low-density parity-check code(LDPC) on finite-state Markov channels was presented and the corresponding factor graph representation was given.It consists of two parts: standard sum-product algorithm(SPA) for LDPC and forward-backward(FB) algorithm for Markov channel.After each iteration for SPA,FB re-estimated the channel likelihood ratio for the next iteration of SPA based on soft decisions for noise bits from SPA.Considering more cycles in the factor graph with the introduction of the Markov channel node,the probabilistic schedule was used to update the message during the iterations for decoding.Simulation results show that the algorithm not only performs much better than the standard sum-product algorithm,but also outperforms the algorithm based on hard decisions for noise bits.
In this paper, a non-uniform quantization scheme is proposed for the decoding of Low-Density Parity-Check (LDPC) codes with the Sum-Product Algorithm (SPA). With the proposed scheme, the quantization-range and quantization-interval for the soft Log-Likelihood-Ratio (LLR) values of the decoder input, the variable nodes, and the check nodes are set separately, and are also adjusted according to the evolution of the probability density distribution of the LLR values in the iterative decoding procedure to minimize the difference between the decoding values before quantization and that after quantization. Simulation results show that decoding with 3-bit non-uniform quantization of the proposed scheme may obtain a BER performance slightly better than that of decoding with 6-bits quantization of the traditional uniform quantization method.
Recent advances in coding theory have uncovered the previously forgotten power of Low-Density Parity-Check (LDPC) codes. Their popularity can be related to their relatively simple iterative decoders and their potential to achieve high performance close to shannon limit. These make them an attractive candidate for error correcting application in communication systems. In this thesis, we focus our research on the iterative decoding algorithms for Low-Density Parity-Check codes and present an improved decoding algorithm. First, the graph structure of LDPC codes is studied and a graph-based search algorithm to find the shortest closed walk and shortest cycle for each node of the graph is proposed. Then, the Deterministic schedule is applied on nodes of the graph with the objective of preserving the optimality of the algorithms. Finally, Hybrid Switch-Type technique is applied on the improved algorithms to provide a desirable complexity/performance trade-off. Hybrid Technique and Deterministic schedule are combined for decoding regular and irregular LDPC codes. The performance and complexity of the decoder is studied for Sum-Product and Gallager A algorithms. The result is a flexible decoder for any available LDPC code and any combination of decoding algorithms based on the communication systems need. In this technique, we benefit the high performance of soft-decision algorithms and low complexity of hard-decision algorithms by changing the decoding rule after a few iterations. Hence, a desirable performance can be obtained with less average number of soft iterations. Moreover, all the nodes do not update messages in each iteration. As a result, the total number of computations is reduced considerably
Low Density Parity Check Codes (LDPC) give groundbreaking performance which is known to approach Shannon's limits for sufficiently large block length. Historically and recently, LDPC have been known to give superior performance than concatenated coding. In the following paper, a proposal to modify the standard Min-Sum (MS) algorithm for decoding LDPC codes is presented. This is done by introduction of a difference to sum ratio factor, κ in the check to bit node updating process. The algorithm is further extended by implementing hard decision of the Bit-Flipping (BF) algorithm over the soft decision of MS algorithm. Simulation results demonstrate that the proposed algorithms are effective in imparting a better performance in terms of a lower bit error rate (BER) at medium to high signal to noise ratio (SNR) when compared to the traditional MS algorithm while adding fair amount of complexity.
This paper presents a Relaxed Half-Stochastic (RHS) low-density parity-check (LDPC) decoding algorithm that uses some elements of the sum-product algorithm (SPA) in its variable nodes, but maintains the low-complexity interleaver and check node structures characteristic of stochastic decoders. The algorithm relies on the principle of successive relaxation to convert binary stochastic streams to a log-likelihood ratio (LLR) representation. Simulations of a (2048, 1723) RS-LDPC code show that the RHS algorithm can outperform 100-iterations floating-point SPA decoding. We describe approaches for low-complexity implementation of the RHS algorithm. Furthermore, we show how the stochastic nature of the belief representation can be exploited to lower the error floor.
Low Density Parity Check(LDPC) Codes are a kind of linear block codes approaching Shannon limit. They can be constructed either with spare parity-check matrix or with factor graphs. According to various constructing methods of the codes,several decoding algorithms have been proposed so far. In this paper the constructing method of LDPC codes based on factor graph is introduced at the beginning, then the sum-product decoding algorithm(SPA) is analyzed. Finally the decoding process of LDPC based on SPA algorithm is discussed.