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Design, Automation, and Test in Europe

Saturated Min-Sum Decoding: An “Afterburner” for LDPC Decoder Hardware

Stefan Scholl, Philipp Schläfer, Norbert Wehn

Published Jan 1, 2016• 14 citations
Publisher

Abstract

LDPC codes are usually decoded by iterative belief propagation. However especially for small block lengths conventional belief propagation exhibits significant losses in signal-to-noise ratio compared to maximum likelihood decoding. In this paper we propose the combination of a conventional min-sum decoder enhanced by an advanced decoding scheme, that acts as a kind of “afterburner” to improve the frame error rate. We present hardware architectures and implementation results for a 28nm ASIC technology. The new decoder has a slightly higher complexity, but provides a gain of up to 1.6 dB signal-to-noise ratio over conventional belief propagation decoding for short block length. In addition, we show, that the new decoder implementation can decrease the amount of dark silicon.

DOI
10.3850/9783981537079_0760

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LDPC codes are usually decoded by iterative belief propagation. However especially for small block lengths conventional belief propagation exhibits significant losses in signal-to-noise ratio compared to maximum likelihood decoding. In this paper we propose the combination of a conventional min-sum decoder enhanced by an advanced decoding scheme, that acts as a kind of “afterburner” to improve the frame error rate. We present hardware architectures and implementation results for a 28nm ASIC technology. The new decoder has a slightly higher complexity, but provides a gain of up to 1.6 dB signal-to-noise ratio over conventional belief propagation decoding for short block length. In addition, we show, that the new decoder implementation can decrease the amount of dark silicon.
LDPC codes are commonly decoded by conventional belief propagation algorithms like the min-sum algorithm. However especially for small block lengths belief propagation performs poorly in comparison to maximum likelihood decoding. In this paper we propose a new decoding algorithm, that is inspired by augmented belief propagation from literature and present hardware architectures and implementations for 28nm ASIC technology. The new decoder has a much higher complexity, but provides a gain of up to 1.2 dB signal-to-noise ratio compared to conventional belief propagation decoding.
Low-Density Parity check (LDPC) codes offer high-performance error correction near the Shannon limit which employs large code lengths and some iterations in the decoding process. The conventional decoding algorithm of LDPC is the Log Likelihood Ratio based Belief Propagation (LLR BP) which is also known as the `Sum-Product algorithm' which gives the best decoding performance and requires the most computational complexity and implementations with increased hardware complexity. Another simpler variant of this algorithm is used which is known as `min-sum algorithm' which reduces computational complexity as well as hardware complexity but with reduced accuracy. This paper analyzes the reason min-sum algorithm is more prone to errors when compared to the sum-product algorithm, and puts forward two improved algorithms which improve the performance of the min-sum algorithm with comparable algorithmic complexity.
In this paper, a modified normalized Min-Sum algorithm (MNMSA) is proposed for decoding irregular Low Density Parity Check Codes (LDPC) with non-uniform degree distribution. The proposed algorithm provides an efficient decoding scheme to enhance the error performance of an irregular LDPC code without increasing the hardware complexity. An efficient 6- bit quantization scheme is utilized in the proposed algorithm with optimally combined normalization and down scaling factors to resolve the magnitude overestimation issue which occurs during iterative message passing process between the nodes. The simulation results demonstrate that the proposed algorithm achieves good decoding performance in terms of Frame Error Rate (FER) and Bit Error Rate (BER) without the requirement of complex arithmetic calculations. Compared to other min- sum based decoding algorithms the decoding process of the proposed MNMSA requires only fewer decoding iterations over wide range of signal- to- noise ratio (SNR) to achieve comparable decoding performance to that of Belief Propagation (BP) algorithm without increasing the hardware complexity.
The effects of clipping and quantization on the performance of the min-sum algorithm for the decoding of low-density parity-check (LDPC) codes at short and intermediate block lengths are studied. It is shown that in many cases, only four quantization bits suffice to obtain close to ideal performance over a wide range of signal-to-noise ratios. Moreover, we propose modifications to the min-sum algorithm that improve the performance by a few tenths of a decibel with just a small increase in decoding complexity. A quantized version of these modified algorithms is also studied. It is shown that, when optimized, modified quantized min-sum algorithms perform very close to, and in some cases even slightly outperform, the ideal belief-propagation algorithm at observed error rates.
Min-Sum decoding (MS) is an alternative to belief propagation decoding with substantially lower complexity. MS often results in an overestimation of the log likelihood ratio (LLR) in particular in the early stage of the iterative process. A linear post-processing is usually performed as a compensation. With regular low density parity check codes (LDPC), a fixed scaling of the LLR yields sufficiently good results. In contrast, adaptive strategies are mandatory with irregular codes. It is well known that the scaling factor is an increasing function of the reliability of the LLR. In most of the publications, the scaling factor is envisioned as a function of both the iteration number and the signal-to-noise ratio. It is proposed here to use the mutual information between extrinsics as a measure of the reliability of the LLR. A practical implementation is derived with reasonable complexity. Compared to the literature, the proposed method yields slightly better results in terms of BER and a significant reduction in the number of iterations.
Low Density Parity Check Codes (LDPC) give groundbreaking performance which is known to approach Shannon's limits for sufficiently large block length. Historically and recently, LDPC have been known to give superior performance than concatenated coding. In the following paper, a proposal to modify the standard Min-Sum (MS) algorithm for decoding LDPC codes is presented. This is done by introduction of a factor, intensity reflection coefficient (IRC) in the check to bit node updating process. Simulation results demonstrate that the proposed algorithms are effective in imparting a better performance in terms of a lower bit error rate (BER) at low to medium signal to noise ratio (SNR) when compared to the traditional MS or Belief Propagation (BP) algorithm while adding a minimum amount of complexity.