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Conference on Precision Electromagnetic Measurements

Cryocooled 10 V Programmable Josephson Voltage Standard

Alain Rüfenacht, Logan A. Howe, Anna E. Fox, Robert E. Schwall, Paul D. Dresselhaus, Charles J. Burroughs, S. P. Benz

Published Aug 1, 2014• 5 citations
Publisher

Abstract

Improvements in fabrication and packaging of our 10 V Programmable Josephson Voltage Standard circuits have enabled the successful operation of these devices on a cryocooler. Limited cooling power and temperature oscillations at the chip must not compromise the accuracy of the quantized voltage steps. Flat-spot measurements of quantized voltages produced with all of the sub-arrays when the chip is biased at a temperature of 4.35 K produced a step width of 0.78 mA. This result was obtained with a cryostat that uses a modest 1.3 kW air-cooled compressor that generates 180 mW of cooling power at the chip.

DOI
10.1109/cpem.2014.6898457

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Improvements in fabrication and packaging of our 10 V Programmable Josephson Voltage Standard circuits have enabled the successful operation of these devices on a cryocooler. Limited cooling power and temperature oscillations at the chip must not compromise the accuracy of the quantized voltage steps. Flat-spot measurements of quantized voltages produced with all of the sub-arrays when the chip is biased at a temperature of 4.35 K produced a step width of 0.78 mA. This result was obtained with a cryostat that uses a modest 1.3 kW air-cooled compressor that generates 180 mW of cooling power at the chip.
The two main challenges to operating a programmable Josephson voltage standard (PJVS) on a cryocooler are the available cooling power and the temperature oscillations of the cold head. We overcame these challenges and successfully operated a PJVS circuit on a cryocooler by employing one supercritical helium buffer that damps the temperature oscillations, developing a new cryogenic package that increases the thermal conductivity between the chip and the cold head, and increasing overall device performance with fabrication improvements. A 1.32 mA step width of the quantized voltage produced with all of the subarrays of the PJVS circuit biased was achieved at an operating temperature of 4.3 K. The quantum accuracy of the PJVS is maintained at temperatures up to 4.8 K. This result was obtained with a cryocooler that employs a 3 kW water-cooled compressor to produce at the chip about 270 mW of net cooling power at 4.3 K.
A 10-V programmable Josephson voltage standard (PJVS) circuit including 524 288 vertically stacked NbN/TiN/NbN Josephson junctions was successfully fabricated without any defects. The chip was cooled with a compact cryocooler at a temperature of 9.8 K and generated an output voltage of 17.3 V with the first Shapiro step height of 1.0 mA under microwave irradiation at 16 GHz. Furthermore, the circuit design having the high output voltage increased the number of available chips for the 10-V PJVS. The fabrication yield for the chip, which generates greater than 10 V, was 36%, which is ten times greater than that for a perfect chip without any defects. This method was not effective for the chip that had serious defects, such as a disconnection across the array or short between the array and ground; thus, efforts to reduce such defects, e.g., frequent maintenance inside vacuum chambers for film preparation and etching, were found to be essential.
Using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16V output voltage cooled with a two-stage Gifford–McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3mm×15.3mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16GHz microwaves at 10.2K that generated flat voltage steps with current margins greater than 1mA, which indicates good uniformity of the stacked junctions.
We have demonstrated a programmable Josephson voltage standard (PJVS) operation up to 10.84 V using a multi-chip technique. We combined two PJVS chips fabricated using NbN/(TiN x /NbN) 2 junction technology. Each PJVS chip was mounted on a single chip carrier using bonding wire, and the two chip carriers were connected by a simple Cu lead wire, and mounted on a cryocooler. High-precision measurements confirmed flat voltage steps for all 22 cells, with a peak-to-peak variation of 100 nV and wide margins of at least 0.35 mA. We also confirmed the stability of the voltage steps in spite of a temperature and RF frequency variation of ± 0.1 K and ± 0.1 GHz, respectively.
We report on the performance of a 1-V dc programmable Josephson voltage standard (PJVS) operating on a commercially available Gifford-McMahon cryocooler at 4 K. The NIST-fabricated niobium superconductor-normal metal-superconductor junction chip has been shown to operate successfully as integrated with this cryopackage, generating 1.229 V at the maximum operating frequency of 19.364 GHz with Shapiro steps at constant voltage that are flat to within less than 100 nV. Because of the large operating margin (greater than 1 mA), these steps were highly stable and immune from noise. Differences in behavior of the PJVS in liquid helium and on the cryocooler are discussed. This demonstration paves the way towards automated warming and cooling of the Josephson device and a fully automated voltage standard system.
Abstract The paper describes a dry-cooled AC quantum voltmeter system operated up to kilohertz frequencies and 7 V rms. A 10 V programmable Josephson voltage standard (PJVS) array was installed on a pulse tube cooler (PTC) driven with a 4 kW air-cooled compressor. The operating margins at 70 GHz frequencies were investigated in detail and found to exceed 1 mA Shapiro step width. A key factor for the successful chip operation was the low on-chip power consumption of 65 mW in total. A thermal interface between PJVS chip and PTC cold stage was used to avoid a significant chip overheating. By installing the cryocooled PJVS array into an AC quantum voltmeter setup, several calibration measurements of dc standards and calibrator ac voltages up to 2 kHz frequencies were carried out to demonstrate the full functionality. The results are discussed and compared to systems with standard liquid helium cooling. For dc voltages, a direct comparison measurement between the dry-cooled AC quantum voltmeter and a liquid-helium based 10 V PJVS shows an agreement better than 1 part in 10 10 .