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Superconducting/semiconducting hybrids and advance memory concepts for superconducting electronics. Technical performance report

M. R. Beasley, Mannie Horowitz

Published Jul 30, 1993• 0 citations
OpenAlex

Abstract

The goal of this program is to explore advanced alternatives to the standard approaches to memory in Josephson junction digital electronics. The work includes the physics, circuits and systems aspects of the problem. It is widely recognized that memory is the weak suit of digital superconductive electronics. There are several problems. They are hard to build, particularly at high densities. Their speed is being challenged by leading edge semiconductor memories, albeit at the expense of high power dissipation. They are susceptible to trapped flux, which is both random in space and likely varying in time. All the current approaches to memory are based on the concept of storage of magnetic flux in a superconducting ring first proposed over 25 years ago by Anacker. Basically, there have been no new ideas in superconductive memory since that time.

Related papers

Superconducting/semiconducting hybrids and advance memory concepts for superconducting electronics. Final report, 1 May 1992-30 September 1997

M. R. Beasley, Horowitz

Superconducting logic circuits based on Josephson junctions (JJ) are the fastest, lowest power solid state digital circuit technology known. Large scale integration of such circuits has also been demonstrated. By contrast, current superconducting memory circuits based on flux quantization are not equivalently advanced. Very dense memory chips have not been possible to date and seem unlikely to come without new invention. The goal of this project was to explore alternative approaches to memory that would be compatible with Josephson junction logic circuits and capable of much denser memory arrays. Five new approaches were investigated ranging from modification to the current approach, use of semiconductor CMOS and wholly new concepts based on new physical principles. Three of these were identified as worth pursuing. They are use of cooled CMOS, use of cryogenic hybrid JJ/CMOS memory concepts and a totally new magnetoresistive approach to memory based on the superconductor/ferromagnet proximity effect.

•Nov 1, 1997•0 citations

Josephson-CMOS Hybrid Memories

Qingguo Liu, Qingguo Liu

Abstract : Lack of high-density, fast and memory has been a long-standing problem in superconducting digital electronics. Alternative Josephson-junction-based memory cells and peripheral circuits have intrinsic problems which impede the application of that kind of memory. The CMOS-Josephson hybrid memory idea was proposed in 1992 to circumvent this problem. In the present work we have designed and demonstrated a 64-kb CMOS-Josephson hybrid memory working at 1 GHz. In order to make the hybrid idea practical, a complete and comprehensive 4 K short-channel CMOS model for digital circuits was developed for this dissertation. It has been used in the design of the memory core and peripheral circuits. A fast hybrid interface circuit that transforms single-flux-quantum millivolt 2-ps pulse signals to CMOS volt-level signals has been studied and the optimized design has been completed. Using a nonvolatile cryogenic 3-T DRAM cell, the memory core is designed in such a way that the access time is much less than for room-temperature operation, not only because of the performance upgrade due to the temperature decrease but also because of a different reading mechanism. Fabricated by commercial submicron CMOS processes (0.25 microns and 0.18 microns) and a Nb/AlOx/Nb Josephson-junction process with 2.5 kA/cm2 tunneling current density, the memory chips were bonded together by direct wire-bonding and by flip-chip bump-bonding and tested at low frequencies, high frequencies, respectively. A subnanosecond access time is obtained both from simulations and experiments. The power for an interface circuit is measured to be 0.6 mW. The memory core consumes even less power. The total power consumption depends on the operation mode of the memory and is calculated to be 10 mW for reading and 28 mW for writing. Simulations also indicate that, with more advanced semiconductor and superconductor technologies, larger and faster hybrid memories are expected to be achievable in the future.

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Magnetic Josephson Junction Technology for Digital and Memory Applications

V. V. Ryazanov, V. V. Bol’ginov, Danila S. Sobanin +4 more

The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.

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Memories with Josephson Junctions

Peter Wolf

The talk is based on an overview which was published recently (1). For this reason, only an abstract is given here, which includes Later results not contained in the aforementioned overview. The presently-known Josephson memory cells store information as persistent currents in superconducting loops, or what is equivalent as a magnetic flux in the area of the ring. This method of storage is nonvolatile and has no power consumption in the storing state. In a superconducting ring system, the magnetic flux is quantized, and cells have been built which operate either with only one flux quantum, or with many of them. For the Latter cells with many flux quanta (ring cells), quite a number of designs exist. They have one or two Josephson junctions in the ring, which allow writing. An external junction which is controlled by the ring current serves for non-destructive reading of the information. The smallest cell realized had an area of 900 ?m2 with a 2 ?m minimum line width. Switching speed was ? 80 ps. Cells which store information as a single-flux quantum (single flux-quantum cells = SFQ cells) in the ring, usually contain two Josephson junctions used for reading and writing. Read-out in most of these cells is destructive, but methods of reading non-destructively have also been proposed. The smallest device made had an area of ? 150 ?m2 with a minimum line width of 2 ?m. The read signal had a rise time ? 100 ps.

European Solid-State Circuits Conference (ESSCIRC)•Sep 1, 1978•0 citations

Can superconductive digital systems compete with semiconductor systems?

Harry Kroger, Uttam Ghoshal

The authors review the current status of silicon microprocessors and memories, and briefly contrast this with the current status of superconducting processors and memories. Possible applications for conventional Josephson computers are mentioned, and the difficulties in supplanting silicon technology by any new technology are discussed. An alternate strategy of hybridizing superconductor and semiconductor circuits is proposed. These hybrid circuits will be able to outperform either technology separately. The hybrid circuits combine the virtues of semiconductor circuits which have high density and excellent manufacturability with the virtues of superconductor circuits which are extremely sensitive in detecting currents and have the capability to drive currents in low impedance lines. The authors examine how hybrid circuits can improve two deficiencies of conventional silicon technology, high power dissipation in interconnection circuits and long memory access times, without requiring the use of many superconductive devices.>

IEEE Transactions on Applied Superconductivity•Mar 1, 1993•7 citations

Progress in the area of new energy-efficient basic elements for superconducting electronics

Sergey V. Bakurskiy, A. L. Gudkov, N. V. Klenov +3 more

This review is devoted to a discussion of the prospects for solving the problem of a low degree of integration of the traditional elements for promising (due to the high performance and extremely low energy dissipation) superconducting digital electronics. We define three main directions on the path to compact multi-element Josephson electronic systems: (1) reduction of the Josephson junction to submicron size, (2) decrease of the area of standard logic cells, and (3) fabrication of a compact and rapid Josephson memory. We present the physical foundations of Josephson elements in order to show the fundamental constraints on establishing standard submicron tunnel contacts and compact logic cells/memory elements. This survey clearly demonstrates the essence of breakthrough technological solutions to create ultrasmall heterostructures with desired settings, reduce and optimize logic cells, and create memory unit cells based on Josephson junctions with magnetic layers.

Moscow University Physics Bulletin•Jul 1, 2014•4 citations
The goal of this program is to explore advanced alternatives to the standard approaches to memory in Josephson junction digital electronics. The work includes the physics, circuits and systems aspects of the problem. It is widely recognized that memory is the weak suit of digital superconductive electronics. There are several problems. They are hard to build, particularly at high densities. Their speed is being challenged by leading edge semiconductor memories, albeit at the expense of high power dissipation. They are susceptible to trapped flux, which is both random in space and likely varying in time. All the current approaches to memory are based on the concept of storage of magnetic flux in a superconducting ring first proposed over 25 years ago by Anacker. Basically, there have been no new ideas in superconductive memory since that time.
Superconducting logic circuits based on Josephson junctions (JJ) are the fastest, lowest power solid state digital circuit technology known. Large scale integration of such circuits has also been demonstrated. By contrast, current superconducting memory circuits based on flux quantization are not equivalently advanced. Very dense memory chips have not been possible to date and seem unlikely to come without new invention. The goal of this project was to explore alternative approaches to memory that would be compatible with Josephson junction logic circuits and capable of much denser memory arrays. Five new approaches were investigated ranging from modification to the current approach, use of semiconductor CMOS and wholly new concepts based on new physical principles. Three of these were identified as worth pursuing. They are use of cooled CMOS, use of cryogenic hybrid JJ/CMOS memory concepts and a totally new magnetoresistive approach to memory based on the superconductor/ferromagnet proximity effect.
Abstract : Lack of high-density, fast and memory has been a long-standing problem in superconducting digital electronics. Alternative Josephson-junction-based memory cells and peripheral circuits have intrinsic problems which impede the application of that kind of memory. The CMOS-Josephson hybrid memory idea was proposed in 1992 to circumvent this problem. In the present work we have designed and demonstrated a 64-kb CMOS-Josephson hybrid memory working at 1 GHz. In order to make the hybrid idea practical, a complete and comprehensive 4 K short-channel CMOS model for digital circuits was developed for this dissertation. It has been used in the design of the memory core and peripheral circuits. A fast hybrid interface circuit that transforms single-flux-quantum millivolt 2-ps pulse signals to CMOS volt-level signals has been studied and the optimized design has been completed. Using a nonvolatile cryogenic 3-T DRAM cell, the memory core is designed in such a way that the access time is much less than for room-temperature operation, not only because of the performance upgrade due to the temperature decrease but also because of a different reading mechanism. Fabricated by commercial submicron CMOS processes (0.25 microns and 0.18 microns) and a Nb/AlOx/Nb Josephson-junction process with 2.5 kA/cm2 tunneling current density, the memory chips were bonded together by direct wire-bonding and by flip-chip bump-bonding and tested at low frequencies, high frequencies, respectively. A subnanosecond access time is obtained both from simulations and experiments. The power for an interface circuit is measured to be 0.6 mW. The memory core consumes even less power. The total power consumption depends on the operation mode of the memory and is calculated to be 10 mW for reading and 28 mW for writing. Simulations also indicate that, with more advanced semiconductor and superconductor technologies, larger and faster hybrid memories are expected to be achievable in the future.
The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.
The talk is based on an overview which was published recently (1). For this reason, only an abstract is given here, which includes Later results not contained in the aforementioned overview. The presently-known Josephson memory cells store information as persistent currents in superconducting loops, or what is equivalent as a magnetic flux in the area of the ring. This method of storage is nonvolatile and has no power consumption in the storing state. In a superconducting ring system, the magnetic flux is quantized, and cells have been built which operate either with only one flux quantum, or with many of them. For the Latter cells with many flux quanta (ring cells), quite a number of designs exist. They have one or two Josephson junctions in the ring, which allow writing. An external junction which is controlled by the ring current serves for non-destructive reading of the information. The smallest cell realized had an area of 900 ?m2 with a 2 ?m minimum line width. Switching speed was ? 80 ps. Cells which store information as a single-flux quantum (single flux-quantum cells = SFQ cells) in the ring, usually contain two Josephson junctions used for reading and writing. Read-out in most of these cells is destructive, but methods of reading non-destructively have also been proposed. The smallest device made had an area of ? 150 ?m2 with a minimum line width of 2 ?m. The read signal had a rise time ? 100 ps.
The authors review the current status of silicon microprocessors and memories, and briefly contrast this with the current status of superconducting processors and memories. Possible applications for conventional Josephson computers are mentioned, and the difficulties in supplanting silicon technology by any new technology are discussed. An alternate strategy of hybridizing superconductor and semiconductor circuits is proposed. These hybrid circuits will be able to outperform either technology separately. The hybrid circuits combine the virtues of semiconductor circuits which have high density and excellent manufacturability with the virtues of superconductor circuits which are extremely sensitive in detecting currents and have the capability to drive currents in low impedance lines. The authors examine how hybrid circuits can improve two deficiencies of conventional silicon technology, high power dissipation in interconnection circuits and long memory access times, without requiring the use of many superconductive devices.>
This review is devoted to a discussion of the prospects for solving the problem of a low degree of integration of the traditional elements for promising (due to the high performance and extremely low energy dissipation) superconducting digital electronics. We define three main directions on the path to compact multi-element Josephson electronic systems: (1) reduction of the Josephson junction to submicron size, (2) decrease of the area of standard logic cells, and (3) fabrication of a compact and rapid Josephson memory. We present the physical foundations of Josephson elements in order to show the fundamental constraints on establishing standard submicron tunnel contacts and compact logic cells/memory elements. This survey clearly demonstrates the essence of breakthrough technological solutions to create ultrasmall heterostructures with desired settings, reduce and optimize logic cells, and create memory unit cells based on Josephson junctions with magnetic layers.