Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

International Symposium on Information Theory and its Applications

A Soft-input and output Iterative Decoding Algorithm using an Algebraic Decoding for Non-binary Codes

Hitoshi Tokushige

Published Jan 1, 2002• 1 citation
OpenAlex

Related papers

A Soft-input and output Iterative Decoding Algorithm for Product Codes

Hitoshi Tokushige, P C Fossorier Marc, Tadao Kasami

IEEE International Symposium on Information Theory (ISIT)•Nov 20, 2005•0 citations

Soft-Input Soft-Output Decoding Algorithm Based on Iterative Minimum Distance Search for Reed-Muller Codes

Jun Asatani, Takuya Koumoto, Toru Fujiwara +1 more

IEEE International Symposium on Information Theory (ISIT)•Dec 15, 2003•0 citations

On a soft-input and output iterative decoding algorithm for Reed-Solomon codes

Hitoshi Tokushige, 研一 有本, Masami Mohri +1 more

IEICE Technical Report; IEICE Tech. Rep.•Mar 9, 2007•0 citations

On a reduced complexity soft-input and output iterative decoding algorithm for product codes(HISC2006)

Hitoshi Tokushige, M.P.C. Fossorier, Tadao Kasami

Information technology newsletter•May 18, 2006•0 citations

Selection Method of Search Centers in Iterative Soft-decision Decoding Algorithms for Non Binary Codes (情報通信基礎サブソサイエティ合同研究会)

仁 得重, I. Hisadomi, 忠雄 嵩

IEICE Technical Report; IEICE Tech. Rep.•Mar 19, 2002•0 citations

A New Iterative Threshold Decoding Algorithm for non-binary OSMLD Codes

Zakaria M’rabet, Fouad Ayoub, Mostafa Belkasmi

In this paper, we devise a non-binary version of the Soft-Input Soft-Output Iterative Threshold Decoder (ITD). This is a continuation of our work where the devised algorithm is the upgrade of the non-iterative non-binary Soft-Input Hard-Output Threshold Decoder (TD), which is itself an upgrade of previous work on the Hard-Input Hard-Output non-binary Majority-Logic Decoder (MLGD). The proposed ITD showed an improvement compared to its predecessors where coding gains of 1.5dB and 2.5dB were observed compared to the TD algorithm and the MLGD algorithm respectively, at a bit error rate (BER) of 10-5. The proposed decoder is best suited for One-Step Majority-Logic decodable codes with a large orthogonal structure in their dual codes, such as finite geometry codes, which are also Low-Density Parity-Check codes. The performances of our decoder are presented in terms of bit, symbol, and block error rates, and the proposed decoder has shown to outperform the best well-known decoders for LDPC codes as displayed by the simulation results. Where the proposed decoder offers a coding gain of 1dB compared to the Min-Max algorithm, 1.5dB of coding gain compared to the ISRB algorithm, and 1.6dB of coding gain compared to the KV algorithm at a block error rate (BLER) of 10-4. Also, the computational complexity of our decoder is proven to be lower than that of the ISRB algorithm, which has itself been proven to be less complex than the other algorithms in the study conducted by its authors.

International Conference on Advanced Communication Technologies and Networking (CommNet)•Dec 12, 2022•0 citations
In this paper, we devise a non-binary version of the Soft-Input Soft-Output Iterative Threshold Decoder (ITD). This is a continuation of our work where the devised algorithm is the upgrade of the non-iterative non-binary Soft-Input Hard-Output Threshold Decoder (TD), which is itself an upgrade of previous work on the Hard-Input Hard-Output non-binary Majority-Logic Decoder (MLGD). The proposed ITD showed an improvement compared to its predecessors where coding gains of 1.5dB and 2.5dB were observed compared to the TD algorithm and the MLGD algorithm respectively, at a bit error rate (BER) of 10-5. The proposed decoder is best suited for One-Step Majority-Logic decodable codes with a large orthogonal structure in their dual codes, such as finite geometry codes, which are also Low-Density Parity-Check codes. The performances of our decoder are presented in terms of bit, symbol, and block error rates, and the proposed decoder has shown to outperform the best well-known decoders for LDPC codes as displayed by the simulation results. Where the proposed decoder offers a coding gain of 1dB compared to the Min-Max algorithm, 1.5dB of coding gain compared to the ISRB algorithm, and 1.6dB of coding gain compared to the KV algorithm at a block error rate (BLER) of 10-4. Also, the computational complexity of our decoder is proven to be lower than that of the ISRB algorithm, which has itself been proven to be less complex than the other algorithms in the study conducted by its authors.