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Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

A low bias variation SPAD-based pixel for a quantum random generator

Nicola Massari, Leonardo Gasparini, Alessandro Tomasi, Alessio Meneghetti, Daniele Perenzoni, David Stoppa

Published Oct 13, 2015• 2 citations
Publisher

Abstract

The present work is focused on the description of a SPAD-based pixel suitable for random bits extraction. Compared to the state-of-the-art, the proposed approach aims at improving the performance of the random generator with respect to possible photon flux variation. Thanks to the adopted methodology, the entropy of the output is maintained almost constant over a wide range of operating conditions. The principle has been validated through simulations and implemented in a compact pixel, suitable for array implementation.

DOI
10.1117/12.2195086

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The present work is focused on the description of a SPAD-based pixel suitable for random bits extraction. Compared to the state-of-the-art, the proposed approach aims at improving the performance of the random generator with respect to possible photon flux variation. Thanks to the adopted methodology, the entropy of the output is maintained almost constant over a wide range of operating conditions. The principle has been validated through simulations and implemented in a compact pixel, suitable for array implementation.
A robust true random number generator (TRNG), able to assure high quality output at different working conditions, is an attractive solution in secure communication application, because it increases resilience against possible external attacks. Among different TRNGs, quantum RNGs (QRNG) represent a good candidate for such systems, because of their compactness, low cost and performance [1–6]. They typically consist of a source of photons, such as an attenuated LED, coupled to a detector with single photon capability (SPAD). Many works in the literature have used a single detector [1–4] for random bit extraction. These devices are characterized by a limited bit rate [1], which can be increased by exploiting the arrival time of photons at the cost of circuit and system complexity [2–4]. Recent works [5–6] proposed to implement an array of detectors based on SPAD working in parallel thus extending the speed of QRNG up to 5 Gb/s [5]. Despite the high bit rate, the main drawback of [5] is the strong dependence of each pixel bias on the impinging light intensity which forces the system to work only for a narrow range of photon flux that poses several constraints on the design of the final QRNG system, e.g. the need of a feedback control loop to maintain a constant flux of photons, and of a uniform distribution of light over the entire sensor. Moreover, it is impractical to implement algorithms for bit extraction to all detectors of the array because of different responses and mismatches among SPADs.
A quantum random generator based on photon detection is here presented. The system consists of a photon source, typically a commercial LED, coupled with a detector with single photon detection capability. The detector is composed of a Single-Photon Avalanche Diode (SPAD) and a time stamp circuit, which samples the arrival time of impinging photons within a predefined temporal window. The proposed implementation optimizes the area, allowing embedding all circuitry into a single pixel, and increases the efficiency of random bit extraction. Moreover, the adopted fast pre-charge mode of the SPAD quenching circuit reduces the afterpulsing probability, and hence possible undesirable correlation in the resulting random bit sequence. Thanks to the implemented random bit extraction, experimental results show that the pixel has a flat behavior for a significant range of light intensity, which makes the pixel robust against variations of external PVT parameters. The maximum achievable bit rate has been measured equal to 1 Mbps, while random sequences are shown to pass NIST tests without any post-processing.
A quantum random generator based on photon detection is here presented. The system consists of a source of photons, typically a commercial LED, coupled with a detector with single photon detection capability. The detector in this case is represented by a single pixel consisting of a SPAD and a time stamp circuit, which samples the arrival time of impinging photons within a predefined temporal window. The proposed implementation increases the efficiency of random bit extraction and reduces the afterpulsing probability, which can introduce undesirable correlation to the measurement. Preliminary results are reported, showing that the pixel has a flat behavior for a relevant range of intensity of the light, which makes the pixel robust against variations of external PVT parameters
A compact quantum random number generator (QRNG) based on an array of Single Photon Avalanche Diodes (SPADs) is presented here. The main feature of the proposed chip is the capability to generate random numbers without the use of any external source of light. In this view, SPADs are configured to be used in two ways: 1) as a controlled light emitter and 2) as a detector. An embedded logic is able to distinguish dark events against detected emitted photon in such a way to make the system sensitive only to the presence of light. The extracted random bits show a uniform distribution and the QRNG, thanks to an integrated conditioning block maximizing the output entropy, eventually passes all AIS31 tests. The average raw bit rate in the default device configuration (one enabled column) is measured equal to 800 kbps.
Quantum random number generators are a burgeoning technology used for a variety of applications, including modern security and encryption systems. Typical methods exploit an entropy source combined with an extraction or bit generation circuit in order to produce a random string. In integrated designs there is often little modelling or analytical description of the entropy source, circuit extraction and post-processing provided. In this work, we first discuss theory on the quantum random flip-flop (QRFF), which elucidates the role of circuit imperfections that manifest themselves in bias and correlation. Then, a Verilog-AMS model is developed in order to validate the analytical model in simulation. A novel transistor implementation of the QRFF circuit is presented, which enables compensation of the degradation in entropy inherent to the finite non-symmetric transitions of the random flip-flop. Finally, a full system containing two independent arrays of the QRFF circuit is manufactured and tested in a 55 nm Bipolar-CMOS-DMOS (BCD) technology node, demonstrating bit generation statistics that are commensurate to the developed model. The full chip is able to generate 3.3 Gbps of data when operated with an external LED, whereas an individual QRFF can generate 25 Mbps each of random data while maintaining a Shannon entropy bound > 0.997, which is one of the highest per pixel bit generation rates to date. NIST STS is used to benchmark the generated bit strings, thereby validating the QRFF circuit as an excellent candidate for fully-integrated QRNGs.
Single-Photon Avalanche Diodes (SPADs) are solid-state photo-detectors capable of detecting single photons by exploiting the avalanche effect that occurs in the breakdown of a p-n junction biased above breakdown voltage. By this effect, a SPAD translates an incoming photon to a macroscopic current pulse. These devices are currently used for building medical devices characterized by a very high time resolution. An appealing application of SPAD is to use them as a basic block for building the entropy source of true random number generators. In this paper we focus on such application, and we explore the design challenges behind the realization of a quantum random number generator based on a massively parallel array of SPADs. The matrix under investigation comprises 512×128 independent cells that convert photons onto a raw bit-stream, which, as ensured by the properties of quantum physics, is characterized by a very high level of randomness. The sequences are read out in a 128-bit parallel bus, concatenated, and pipelined onto a de-biasing filter. Subsequently, we fabricated the proposed chip using a standard CMOS process. Our results, achieved on the manufactured device and coupling two matrices, show that our architecture can reach up to 5 Gbit/s while consuming 25pJ/bit, thus demonstrating scalability and performance for any random number generators based on SPADs.