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IEEE International Symposium on Multiple-Valued Logic (ISMVL)

Dynamic Template Matching with Mixed-Polarity Toffoli Gates

Md. Mazder Rahman, Mathias Soeken, Gerhard W. Dueck

Published May 1, 2015• 4 citations
Publisher

Abstract

The Toffoli gate, as originally proposed, had only positive controls. It has been shown that mixed polarity controlled Toffoli gates can be efficiently implemented. In fact, their quantum cost is the same as for positive controlled gates in most cases. Thus it is advantageous to consider circuits with mixed polarity Toffoli gates. Template matching has been successfully used to reduce the number of Toffoli gates in reversible circuits. Little work on templates with mixed polarity gates has been reported. Unfortunately, the number of potential templates increases dramatically, if mixed polarity is introduced. Here we propose a dynamic template matching algorithm that takes templates with few lines and dynamically extends the lines to find matches. Experimental results show that the proposed approach has a significant impact on reducing the total number of gates (57% in the best case) in circuits.

DOI
10.1109/ismvl.2015.44

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The Toffoli gate, as originally proposed, had only positive controls. It has been shown that mixed polarity controlled Toffoli gates can be efficiently implemented. In fact, their quantum cost is the same as for positive controlled gates in most cases. Thus it is advantageous to consider circuits with mixed polarity Toffoli gates. Template matching has been successfully used to reduce the number of Toffoli gates in reversible circuits. Little work on templates with mixed polarity gates has been reported. Unfortunately, the number of potential templates increases dramatically, if mixed polarity is introduced. Here we propose a dynamic template matching algorithm that takes templates with few lines and dynamically extends the lines to find matches. Experimental results show that the proposed approach has a significant impact on reducing the total number of gates (57% in the best case) in circuits.
Optimal synthesis of reversible circuits is a very hard task. In 2010, a method and a tool of practical usage for finding optimal circuits built from multi-control Toffoli gates for any 4-bit reversible specification were finally developed. In 2011 we published an extension to the algorithm, which allows to reduce the quantum cost of the resulting circuits. In this paper we present another extension to this approach. Namely, we have extended the reversible gate library to mixed-polarity multi-control Toffoli gates (i.e. with both positive and negative controls). Our experimental results for the known reversible benchmarks show that using mixed-polarity Toffoli gates gives significant savings in gate count. The paper presents standard computational experiments for circuit synthesis. These results have implications in testing synthesis algorithms for reversible mixed-polarity circuits and quantum circuits.
Optimal synthesis of reversible circuits is a very hard task. In 2010, a method and a tool of practical usage for finding optimal circuits built from multi-control Toffoli gates for any 4-bit reversible specification were finally developed. In 2011 we published an extension to the algorithm, which allows to reduce the quantum cost of the resulting circuits. In this paper we present another extension to this approach. Namely, we have extended the reversible gate library to mixed-polarity multi-control Toffoli gates (Le. with both positive and negative controls). Our experimental results for the known reversible benchmarks show that using mixed-polarity Toffoli gates gives significant savings in gate count. The paper presents standard computational experiments for circuit synthesis. These results have implications in testing synthesis algorithms for reversible mixed-polarity circuits and quantum circuits.
Reversible gates are gaining popularity in the field of circuit synthesis due to their property of having lower power loss and reduced dissipation of power as heat. These low power design models need to have better optimization properties. In this paper, we have ventured into the template and rule based optimization process. While most reversible netlists are built using the standard Toffoli gates, the proposed Modified Toffoli Gate has been used to achieve optimization. In this paper, the quantum realization of mixed control Modified Toffoli Gate and negative control Modified Toffoli Gates are proposed. Few templates and rules for transforming the original Toffoli network to the Modified Toffoli network are also proposed. This optimization yields a better quantum cost and gate count when compared to that of it's Toffoli counterpart.
We present a new algorithm for synthesis of reversible circuits for arbitrary n-bit bijective functions. This algorithm uses generalized Toffoli gates, which include positive and negative controls. Our algorithm is divided into two parts. First, we use partially controlled gen- eralized Toffoli gates, progressively increasing the number of controls. Second, exploring the properties of the representation of permutations in disjoint cycles, we apply generalized Toffoli gates with controls on all lines except for the target line. Therefore, new in the method is the fact that the obtained circuits use first low cost gates and consider increasing costs towards the end of the synthesis. In addition, we employ two bidirectional synthesis strategies to improve the gate count, which is the metric used to compare the results obtained by our algorithm with the results presented in the literature. Accordingly, our experimental results consider all 3-bit bijective functions and twenty widely used benchmark functions. The results obtained by our synthesis algorithm are competitive when compared with the best results known in the literature, considering as a complexity metric just the number of gates, as done by alternative best heuristics found in the literature. For example, for all 3-bit bijective functions using generalized Toffoli gates library, we obtained the best so far average count of 5.23.
Abstract—Reversible logic has applications in quantum com-puting, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate (which performs a controlled NOT) and the Fredkin gate (performs a controlled swap of two inputs). Our synthesis algorithm first finds a cascade of Toffoli and Fredkin gates with no backtracking and minimal look-ahead. Next we apply trans-formations that reduce the size of the circuit. Transformations are accomplished via template matching. The basis for a template is a network with m gates that realizes the identity function. If a sequence in the network to be synthesized matches more than half of a template, then a transformation that reduces the gate count can be applied. In this paper we show that Toffoli and Fredkin gates behave in a similar manner. Therefore, some gates in the templates may not need to be specified—they can match a Toffoli or a Fredkin gate. We formalize this by introducing the box gate. All templates with less than six gates are enumerated and classified. We synthesize all three input, three output reversible functions and compare our results to those obtained previously. I.
Quantum circuits are often generated by decomposing gates from networks with classical reversible gates. Only in rare cases, the results are minimal. Post-optimization methods, such as template matching, are employed to reduce the quantum costs of circuits. Quantum templates are derived from identity circuits. All minimal realizations, within certain limitations, can be embedded into templates. Due to this property, templates matching has the potential to reduce quantum costs of circuits. However, one of the difficulties in finding templates matches is due to the mobility of the gates within the circuit. Thus far, template matching procedures have employed heuristics to reduce the search space. This article presents an in-depth study of exact template matching with a set of algorithms. A graph structure with the corresponding circuits facilitates the discovery of potential sequences of templates to be matched, and how exact minimization of circuits can be accomplished. The significance of the proposed method is verified in benchmarks optimization.