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ACM Journal on Emerging Technologies in Computing Systems

An Algorithm for Quantum Template Matching

Md. Mazder Rahman, Gerhard W. Dueck, Joseph D. Horton

Published Dec 30, 2014• 20 citations
Publisher

Abstract

Quantum circuits are often generated by decomposing gates from networks with classical reversible gates. Only in rare cases, the results are minimal. Post-optimization methods, such as template matching, are employed to reduce the quantum costs of circuits. Quantum templates are derived from identity circuits. All minimal realizations, within certain limitations, can be embedded into templates. Due to this property, templates matching has the potential to reduce quantum costs of circuits. However, one of the difficulties in finding templates matches is due to the mobility of the gates within the circuit. Thus far, template matching procedures have employed heuristics to reduce the search space. This article presents an in-depth study of exact template matching with a set of algorithms. A graph structure with the corresponding circuits facilitates the discovery of potential sequences of templates to be matched, and how exact minimization of circuits can be accomplished. The significance of the proposed method is verified in benchmarks optimization.

DOI
10.1145/2629537

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Quantum circuits are often generated by decomposing gates from networks with classical reversible gates. Only in rare cases, the results are minimal. Post-optimization methods, such as template matching, are employed to reduce the quantum costs of circuits. Quantum templates are derived from identity circuits. All minimal realizations, within certain limitations, can be embedded into templates. Due to this property, templates matching has the potential to reduce quantum costs of circuits. However, one of the difficulties in finding templates matches is due to the mobility of the gates within the circuit. Thus far, template matching procedures have employed heuristics to reduce the search space. This article presents an in-depth study of exact template matching with a set of algorithms. A graph structure with the corresponding circuits facilitates the discovery of potential sequences of templates to be matched, and how exact minimization of circuits can be accomplished. The significance of the proposed method is verified in benchmarks optimization.
Optimal synthesis of quantum circuits is intractable and heuristic methods must be employed. Templates are a general approach to reversible quantum circuit simplification. We consider the use of templates to simplify a quantum circuit initially found by other means. We present and analyze templates in the general case, and then provide particular details for circuits composed of NOT, CNOT and controlled-sqrt-of-NOT gates. We introduce templates for this set of gates and apply them to simplify both known quantum realizations of Toffoli gates and circuits found by earlier heuristic Fredkin and Toffoli gate synthesis algorithms. While the number of templates is quite small, the reduction in quantum cost is often significant.
The execution of quantum algorithms requires two key considerations. On the one hand, it should meet the connectivity constraint requirements of quantum circuit mapping for quantum architectures, and on the other hand, it needs to consider reducing the probability of errors in the execution of quantum circuits as much as possible. This paper proposes a novel optimization technique based on template matching that to satisfy both requirements. The template matching optimization method can significantly reduce the number of gates in a quantum circuit and further enhance its practicality. It stands as advanced optimization technology available today. Our method optimizes quantum logic circuits mapped onto quantum architecture by initially selecting their linear substructure. We then zone the circuit according to the gate dependency graph and optimize each block through template matching. Finally, we reorganize the circuit to obtain the optimized version as the final result. Our proposed method is amenable to various quantum architectures. To evaluate its efficacy, we conduct a comparative analysis with the t|ket⟩ and Qiskit compiler using a set of benchmark test circuits. Specifically, compare to the t|ket⟩ compiler method, the highest average optimization rate of our method can reach 25.75%. Compare with the Qiskit compiler method, the highest average optimization rate can reach 32.72%. Overall, our approach has significant optimization advantages.
In order to reduce the number of gates in quantum circuit to reduce the error rate running on NISQ device, it is demonstrated that the template satisfies the relevant conditions for mapping to the linear topology structure in the quantum system, and a quantum circuit connectivity constraint mapping optimization method based on template matching is proposed. This method reconstructs the templates by adding SWAP gates or replacing bridge gates to make them meet the connectivity constraints of linear topology. Aiming at the linear subcircuits in quantum circuits that satisfy the connectivity constraints of quantum topological structure, the template matching optimization method is used to replace the gates in the circuit that match the template with a few remaining unmatched gates in the template. Finally, the optimized circuit also satisfies the connectivity constraint of quantum topology. Using a set of NISQ benchmark circuits, compared with the t|ket⟩ compiler, the test results show that the number of CNOT gates can be further reduced by an average of 28.71 %, up to 40 %.
The Toffoli gate, as originally proposed, had only positive controls. It has been shown that mixed polarity controlled Toffoli gates can be efficiently implemented. In fact, their quantum cost is the same as for positive controlled gates in most cases. Thus it is advantageous to consider circuits with mixed polarity Toffoli gates. Template matching has been successfully used to reduce the number of Toffoli gates in reversible circuits. Little work on templates with mixed polarity gates has been reported. Unfortunately, the number of potential templates increases dramatically, if mixed polarity is introduced. Here we propose a dynamic template matching algorithm that takes templates with few lines and dynamically extends the lines to find matches. Experimental results show that the proposed approach has a significant impact on reducing the total number of gates (57% in the best case) in circuits.
Quantum circuit optimization is a key step toward the efficient execution of quantum algorithms. Template matching has emerged as one of the dominant approaches for simplifying quantum circuits, yet it confronts the intrinsic challenge of accommodating gate commutativity. The state-of-the-art template-matching algorithm relies on a directed acyclic graph (DAG) representation. While this DAG-based technique handles gate commutativity satisfactorily, it fails to preserve the local connectivity inherent to quantum circuits, thereby leading to relatively high matching complexity. In this paper, we introduce a hypergraph representation (HG), a commutativity-aware representation that collapses commuting gates into a single super-node while retaining all local connectivity. This enables matches to be extended locally without revisiting the rest of the circuit, with incremental updates limited to the immediate neighborhood. Experimental results demonstrate that our HG matcher achieves 11--606x speed-up over the DAG-based implementation in Qiskit (Iten et al., 2022) on both random and arithmetic benchmarks, while maintaining the same optimization quality. The acceleration increases with circuit size, confirming that preserving locality and connectivity is the key to scalable quantum circuit optimisation.