In this paper, decoding of LDPC convolutional codes with rational parity-check matrices (LDPC-CC-RPCM) is investigated. We show that Tanner graph of every LDPC-CC-RPCM can always be transformed into an equivalent one with enlarged girth and finite memory order suitable for practical pipeline decoder. Based on the transformed graph, a dynamic scheduling-aided decoding scheme with the enhancement of signal perturbation and error cancellation is presented to improve the convergence speed and bit-error-rate performance in both of the waterfall and error-floor regions. Simulation results also reveal that LDPC-CC-RPCM may outperform ordinary LDPC-CC with polynomial parity-check matrices in some cases under the same code rate and decoding complexity.
In this paper, decoding of LDPC convolutional codes with rational parity-check matrices (LDPC-CC-RPCM) is investigated. We show that Tanner graph of every LDPC-CC-RPCM can always be transformed into an equivalent one with enlarged girth and finite memory order suitable for practical pipeline decoder. Based on the transformed graph, a dynamic scheduling-aided decoding scheme with the enhancement of signal perturbation and error cancellation is presented to improve the convergence speed and bit-error-rate performance in both of the waterfall and error-floor regions. Simulation results also reveal that LDPC-CC-RPCM may outperform ordinary LDPC-CC with polynomial parity-check matrices in some cases under the same code rate and decoding complexity.
Previous studies on low-density parity-check convolutional codes (LDPC-CC) reveal that LDPC-CC with rational parity-check matrices (RPCM) suffer from the unaffordable decoding latency/complexity due to the infinite memory order and the poor bit-error-rate performance due to the existence of length-4 cycles in the Tanner graph. However, in this paper, we show that every LDPC-CC with RPCM can be associated with an equivalent Tanner graph which can avoid the infinite memory order and undesired short length cycles but still implements the same constraints specified by the RPCM. Together with the iterative decoding based on belief propagation with proper scheduling, simulation results indicate that LDPC-CC with RPCM can also provide satisfactory decoding performance.
The best known practical algorithm for the decoding of low-density parity-check (LDPC) codes is the iterative sum-product or belief propagation algorithm, operating on a Tanner graph (TG) of the code. Conventionally, in each iteration, all the symbol nodes and subsequently all the check nodes in the TG pass new messages to their neighbors (the so-called "flooding schedule"). We propose a new message-passing schedule, called "probabilistic schedule." Unlike flooding, the probabilistic schedule operates based on the structure of the TG, and probabilistically balances the frequency at which different symbol nodes update their outgoing messages in accordance with their girths. Our results show that, particularly for short block lengths, the new schedule offers a much better performance/complexity trade-off. For a particular example of a (1268,456) code, at no cost in complexity, the probabilistic schedule not only decreases both the bit and message error rates by an order of magnitude, but also reduces the number of undetected errors considerably. This work shows the importance of scheduling in the performance of iterative decoding algorithms and suggests that a schedule which matches the structure of the TG can substantially improve the performance/complexity trade-off in the decoding of short LDPC codes.
The informed dynamic scheduling (IDS) strategy decoding algorithms performed exceptionally well for low-density parity-check codes in terms of the error-rate performance. However, the IDS decoding algorithm is greedy because of the unfair computation resources allocation among different variables nodes, which leads to poor convergence performance. In order to reduce the greediness of the IDS algorithm, the tabu search (TS) algorithm is introduced to the dynamic scheduling-based decoding in this paper. In the TS-based dynamic scheduling (TSDS) algorithm, the variable nodes in the Tanner graph are temporarily stored in a tabu list. In the decoding process with the TSDS algorithm, variable nodes stored in the tabu list will not be selected and updated until they are shifted out of the tabu list. Besides, an improved updating order is provided for the TSDS algorithm, by which the computational complexity can be decreased without the loss of error correction performance. Simulation results show that the proposed algorithm outperforms other decoding algorithms of interest in terms of bit error rate and convergence performance over the additive white Gaussian noise channel.
The best known practical algorithm for the decoding of low-density parity-check (LDPC) codes is the iterative sum-product or belief propagation algorithm, operating on a Tanner graph (TG) of the code. Conventionally, in each iteration, all the symbol nodes and subsequently all the check nodes in the TG pass new messages to their neighbors (the so-called "flooding schedule"). We propose a new message-passing schedule, called "probabilistic schedule". Unlike flooding, the probabilistic schedule operation is based on the structure of the TG, and probabilistically balances the frequency at which different symbol nodes update their outgoing messages in accordance with their girths. Our results show that, particularly for short block lengths, the new schedule offers a much better performance/complexity trade-off. For a particular example of a (1268, 456) code, at no cost in complexity, the probabilistic schedule not only decreases both the bit and message error rates by an order of magnitude, but also reduces the number of undetected errors considerably. This work shows the importance of scheduling in the performance of iterative decoding algorithms and suggests that a schedule which matches the structure of the TG can substantially improve the performance/complexity trade-off in the decoding of short LDPC codes.
Low-density parity-check convolutional codes (LDPC-CC) have interesting error correction features. They have a great potential to become a key error-correcting codes for enhancing reliability of modern digital communication systems, optical systems and storage devices. On the implementation side, however, the design of low-cost low-power and high-throughput LDPC-CC decoders remains challenging. This survey paper provides an overview of the state-of-the-art of different algorithmic optimizations proposed to ease and improve the LDPC-CC decoder implementations. To this end, a summary of the available decoding scheduling approaches is provided. Besides, a complexity analysis, performance comparison and an architectural analysis of LDPC-CC decoders based on different scheduling techniques is detailed.
Low-Density Parity-Check (LDPC) codes are usually decoded by running an iterative belief-propagation (BP), or message-passing, algorithm over the factor graph of the code. The traditional message-passing scheduling, called flooding, consists of updating all the variable nodes in the graph, using the same pre-update information, followed by updating all the check nodes of the graph, again, using the same pre-update information. Recently, several studies show that sequential scheduling, in which messages are generated using the latest available information, significantly improves the convergence speed in terms of number of iterations. Sequential scheduling introduces the problem of finding the best sequence of message updates. We propose Informed Dynamic Scheduling (IDS) strategies that select the message-passing schedule according to the observed rate of change of the messages. In general, IDS strategies require computation to select the message to update but converge in fewer message updates because they focus on the part of the graph that has not converged. Moreover, IDS yields a lower error-rate performance than either flooding or sequential scheduling because IDS strategies overcome traditional trapping-set errors. This paper presents IDS strategies that address several issues including performance for short-blocklength codes, complexity, and implementability.