Work is in progress throughout the globe to efficiently use the potential of the quantum theory of computation over their classical counterpart and hence there is a need of building quantum computing hardware. The target of building quantum computers can be achieved if we have better tools for the design of quantum hardware. Quantum circuit simulators are tools for the logic verification of quantum circuits and they can be an essential component of quantum CAD tools in the future. This work is the extension of the previous work by the authors, in order to increase the efficiency of the simulator and to incorporate more components in the gate library. In this paper we have proposed an efficient simulator which can simulate a quantum circuit specified using the proposed quantum hardware descriptive language (QHDL).
Work is in progress throughout the globe to efficiently use the potential of the quantum theory of computation over their classical counterpart and hence there is a need of building quantum computing hardware. The target of building quantum computers can be achieved if we have better tools for the design of quantum hardware. Quantum circuit simulators are tools for the logic verification of quantum circuits and they can be an essential component of quantum CAD tools in the future. This work is the extension of the previous work by the authors, in order to increase the efficiency of the simulator and to incorporate more components in the gate library. In this paper we have proposed an efficient simulator which can simulate a quantum circuit specified using the proposed quantum hardware descriptive language (QHDL).
Abstract-Quantum theory of computation establishes that there are problems for which quantum algorithms are far more efficient than their classical counterpart. Advances in quantum computing have initiated the design of systems based on quantum logic gates. Quantum computer hardware being primarily available in research laboratories at present, it mandates the ability to design, develop and test quantum logic operations by simulation of quantum logic circuits on classical computers. In this paper, we have defined a programming model for the design of a quantum circuit simulator, which can simulate a given quantum circuit obeying the rules of quantum gate operations. The quantum gate operations on both pure and superposed quantum states are being done with the help of effective data structures. The proposed quantum circuit simulator also incorporates the simulation of quantum circuit error under the action of certain quantum faults.
The quantum algorithms could efficiently solve problems having exponential classical solutions [8]. The circuit model is considered as the most feasible implementation of the quantum algorithms [17]. This paper tries to find common ground between classical circuit design techniques and quantum computation, by identifying quantum circuit specification and simulation tools under the form of Hardware Description Languages (HDLs). The HDL-based simulation approach could reduce the complexity of quantum circuit simulation, by considering entanglement as the main source of gate-level simulation complexity, and isolating it in an automated manner. This is possible by taking advantage of the HDL feature of describing a circuit with both structural and functional architectures. We also performed an analysis of our methodology effectiveness, for the arithmetic circuits involved in Shor's algorithm and the circuits implementing Grover's algorithm. Our method is further improved by an entangled representation avoidance technique called 'bubble logic insertion'.
Developing state-of-the-art classical simulators of quantum circuits is of utmost importance to test and evaluate early quantum technology and understand the true potential of full-blown error-corrected quantum computers. In the past few years, multiple theoretical and numerical advances have continuously pushed the boundary of what is classically simulable, hence the development of a plethora of tools which are often limited to a specific purpose or designed for a particular hardware (e.g. CPUs vs. GPUs). Moreover, such tools are typically developed using tailored languages and syntax, which makes it hard to compare results from, and create hybrid approaches using, different simulation techniques. To support unified and optimized use of these techniques across platforms, we developed HybridQ , a highly extensible platform designed to provide a common framework to integrate multiple state-of-the-art techniques to run on a variety of hardware. The philosophy behind its development has been driven by three main pillars: Easy to Use, Easy to Extend, and Use the Best Available Technology. The powerful tools of HybridQ allow users to manipulate, develop, and extend noiseless and noisy circuits for different hardware architectures. HybridQ supports large-scale high-performance computing (HPC) simulations, automatically balancing workload among different processor nodes and enabling the use of multiple backends to maximize parallel efficiency. Everything is then glued together by a simple and expressive language that allows seamless switching from one technique to another as well as from one hardware to the next, without the need to write lengthy translations, thus greatly simplifying the development of new hybrid algorithms and techniques.
Quantum computers promise to efficiently solve important problems classical computers never will. However, in order to capitalize on these prospects, a fully automated quantum software stack needs to be developed. This involves a multitude of complex tasks from the classical simulation of quantum circuits, over their compilation to specific devices, to the verification of the circuits to be executed as well as the obtained results. All of these tasks are highly non-trivial and necessitate efficient data structures to tackle the inherent complexity. Starting from rather straight-forward arrays over decision diagrams (inspired by the design automation community) to tensor networks and the ZX-calculus, various complementary approaches have been proposed. This work provides a look "under the hood" of today's tools and showcases how these means are utilized in them, e.g., for simulation, compilation, and verification of quantum circuits.
While thousands of experimental physicists and chemists are currently trying to build scalable quantum computers, it appears that simulation of quantum computation will be at least as critical as circuit simulation in classical VLSI design. However, since the work of Richard Feynman in the early 1980s little progress was made in practical quantum simulation. Most researchers focused on polynomial-time simulation of restricted types of quantum circuits that fall short of the full power of quantum computation. Simulating quantum computing devices and useful quantum algorithms on classical hardware now requires excessive computational resources, making many important simulation tasks infeasible. In this work we propose a new technique for gate-level simulation of quantum circuits which greatly reduces the difficulty and cost of such simulations. The proposed technique is implemented in a simulation tool called the Quantum Information Decision Diagram (QuIDD) and evaluated by simulating Grover's quantum search algorithm. The back-end of our package, QuIDD Pro, is based on Binary Decision Diagrams, well-known for their ability to efficiently represent many seemingly intractable combinatorial structures. This reliance on a well-established area of research allows us to take advantage of existing software for BDD manipulation and achieve unparalleled empirical results for quantum simulation.
Current technology for building digital computers is predicted to reach its limit within the next 10 years due to the increasing miniaturization of digital components. By reaching sizes of a few nanometers, electrons stop behaving as particles and start behaving as waves, obeying essentially the principles of Quantum Mechanics, and effects such as interference, superposition and entanglement become dominant. The utilization of those effects allows more that just an evolution of the miniaturization process. It allows for a computational parallelism impossible to be obtained efficiently through classical computational methods or devices. Several algorithms utilizing such effects have been proposed and indicated that Quantum Computation is significantly more efficient at solving certain class of problems than classical computation. Actually, there is not yet any hardware (a quantum computer) able to compute a useful algorithm outside of research labs. A turn-around to that problem is to simulate the behavior of a quantum computer by a classical computer. There are, to this day, a number of quantum computer simulators available which, in general, use the quantum circuit model defined by Deutsch. Just a few of them are universal. We have developed a novel universal quantum circuit simulator, called Zeno, to the design and test of quantum algorithms. Zeno offers a set of features that engulfs most of the features presented by the other existing universal quantum circuit simulators and that also allows it to be used in the design and simulation of quantum channels.