Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed under idealized assumptions without important physical constraints in mind. In this paper, we analyze two key constraints: the short spatial distance of quantum interactions and the short temporal life of quantum data.In particular, quantum computations must make use of extremely robust error correction techniques to extend the life of quantum data. We present optimized spatial layouts of quantum error correction circuits for quantum bits embedded in silicon. We analyze the complexity of error correction under the constraint that interaction between these bits is near neighbor and data must be propagated via swap operations from one part of the circuit to another.We discover two interesting results from our quantum layouts. First, the recursive nature of quantum error correction circuits requires a additional communication technique more powerful than near-neighbor swaps -- too much error accumulates if we attempt to swap over long distances. We show that quantum teleportation can be used to implement recursive structures. We also show that the reliability of the quantum swap operation is the limiting factor in solid-state quantum computation.
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed under idealized assumptions without important physical constraints in mind. In this paper, we analyze two key constraints: the short spatial distance of quantum interactions and the short temporal life of quantum data.In particular, quantum computations must make use of extremely robust error correction techniques to extend the life of quantum data. We present optimized spatial layouts of quantum error correction circuits for quantum bits embedded in silicon. We analyze the complexity of error correction under the constraint that interaction between these bits is near neighbor and data must be propagated via swap operations from one part of the circuit to another.We discover two interesting results from our quantum layouts. First, the recursive nature of quantum error correction circuits requires a additional communication technique more powerful than near-neighbor swaps -- too much error accumulates if we attempt to swap over long distances. We show that quantum teleportation can be used to implement recursive structures. We also show that the reliability of the quantum swap operation is the limiting factor in solid-state quantum computation.
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed under idealized assumptions without important physical constraints in mind. In this paper, we analyze two key constraints: the short spatial distance of quantum interactions and the short temporal life of quantum data.In particular, quantum computations must make use of extremely robust error correction techniques to extend the life of quantum data. We present optimized spatial layouts of quantum error correction circuits for quantum bits embedded in silicon. We analyze the complexity of error correction under the constraint that interaction between these bits is near neighbor and data must be propagated via swap operations from one part of the circuit to another.We discover two interesting results from our quantum layouts. First, the recursive nature of quantum error correction circuits requires a additional communication technique more powerful than near-neighbor swaps -- too much error accumulates if we attempt to swap over long distances. We show that quantum teleportation can be used to implement recursive structures. We also show that the reliability of the quantum swap operation is the limiting factor in solid-state quantum computation.
Advances in quantum devices have brought scalable quantum computation closer to reality. We focus on the system-level issues of how quantum devices can be brought together to form a scalable architecture. In particular, we examine promising silicon-based proposals. We discover that communication of quantum data is a critical resource in such proposals. We find that traditional techniques using quantum SWAP gates are exponentially expensive as distances increase and propose quantum teleportation as a means to communicate data over longer distances on a chip. Furthermore, we find that realistic quantum error-correction circuits use a recursive structure that benefits from using teleportation for long-distance communication. We identify a set of important architectural building blocks necessary for constructing scalable communication and computation. Finally, we explore an actual layout scheme for recursive error correction, and demonstrate the exponential growth in communication costs with levels of recursion, and that teleportation limits those costs.
As the complexity of quantum computers increases, typical architectural issues such as communication, layout, and efficient design need to be addressed. This document addresses some basic architectural ideas for quantum computers.
To be useful in reasonable calculations, quantum states will need constant error correction. This need guides how best to lay out physical components to minimize error-correction overhead. I propose a layout that minimizes communication overhead, and discuss the implementation of error-correction algorithms on that layout. I compare the cost overhead of purely local communication to communication by teleportation, and calculate the break-even point at which teleportation becomes efficient.
Additionally, the overhead of error correction can be reduced by using a memory hierarchy to more efficiently store data not currently being computed on. The main requirement is the same as for a classical computer's cache: temporal locality. I show that an important quantum routine can be rearranged to take advantage of a small quantum memory cache, and compute the achieved savings.
In a quantum system, complex operators are built up from the basic operators allowed by a given technology model. I show that the set of operators required to implement any complex operator in an error-corrected system can be approximated to arbitrary precision, given two elementary operators. I give results for all the operators in the set.
Finally, I examine methods to initialize a quantum system. Quantum operators are reversible, so data cannot simply be written over. Instead, initialization entails compressing the entropy of a set of quantum bits into a small subset of those bits, leaving the rest of the bits in a known, non-random state. I examine three such compression algorithms. The best of these itself requires a pool of known states, and so cannot be used directly. The other two algorithms, however, produce less-than-optimal results. I explore why they produce suboptimal results, and propose that one of the suboptimal algorithms be used to compress the entropy of a subsystem, using the resulting known state to run the optimal algorithm.
Due to very high projected error rates, large scale quantum computers will require substantial fault tolerance just to maintain a minimum level of reliability. We present tools to better analyze the performance of large, fault tolerant quantum computer designs. We find that current uses of quantum error correction are overly conservative in mitigating the impact of gate errors and negligent of other error sources in quantum data communication and memory.
We have developed circuit layout heuristics to generate detailed designs in trapped ion quantum computing technology. From these designs, we can extract much more accurate error models for a given application, including all gate, movement and idle errors on qubits. Using these extracted models, our flexible error simulation environment determines the overall failure probability of the design. Included in this simulation environment is a bit-parallel Monte Carlo technique that is 10 times faster than previous fault propagation simulations. This allows us to evaluate the reliability of designs that are an order of magnitude larger, in the same amount of time.
Using this analysis framework to verify reliability, we have developed a linear programming-based optimization for error correction which decreases overall circuit resources by an order of magnitude. In some cases, our optimization actually improves overall system reliability by removing error correction. We combine this optimization with judicious quantum error correcting code selection to provide efficient designs for large quantum arithmetic kernels used in Shor's factorization algorithm. We show our optimized designs perform 2x to 100x better than previous works in terms of probabilistic area-delay product. Additionally, the area of our layout of a 1024-bit factoring using Shor's algorithm is 64cm2, a substantial improvement compared to the 0.9m2 state-of-the-art design from prior work. A design size reduction by this amount will make fabricating such an application feasible much sooner.
In this paper we present the impact of classical electronics constraints on a solid-state quantum dot logical qubit architecture. Constraints due to routing density, bandwidth allocation, signal timing, and thermally aware placement of classical supporting electronics significantly affect the quantum error correction circuit's error rate. We analyze one level of a quantum error correction circuit using nine data qubits in a Bacon-Shor code configured as a quantum memory. A hypothetical silicon double quantum dot quantum bit (qubit) is used as the fundamental element. A pessimistic estimate of the error probability of the quantum circuit is calculated using the total number of gates and idle time using a provably optimal schedule for the circuit operations obtained with an integer program methodology. The micro-architecture analysis provides insight about the different ways the electronics impact the circuit performance (e.g., extra idle time in the schedule), which can significantly limit the ultimate performance of any quantum circuit and therefore is a critical foundation for any future larger scale architecture analysis.
A reliable large-scale quantum computer, if built, can solve many real-life problems exponentially faster than the existing digital devices. The biggest obstacle to building one is that they are extremely sensitive and error-prone regardless of the selection of physical implementation. Both data storage and data manipulation require careful implementation and precise control due to its quantum mechanical nature. For the development of a practical and scalable computer, it is essential to identify possible quantum errors and reduce them throughout every layer of the hierarchy of quantum computation.\n\nIn this dissertation, we present our investigation into new methods to reduce errors in quantum computers from three different directions: quantum memory, quantum control, and quantum error correcting codes. For quantum memory, we pursue the potential of the quantum equivalent of a magnetic hard drive using two-body-interaction structures in fractal dimensions. With regard to quantum control, we show that it is possible to arbitrarily reduce error when manipulating multiple quantum bits using a technique popular in nuclear magnetic resonance. Finally, we introduce an efficient tool to study quantum error correcting codes and present analysis of the codes' performance on model quantum architectures.