Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE Transactions on Applied Superconductivity

Single-Flux-Quantum (SFQ) Circuit Design and Test of Crossbar Switch Scheduler

Y. Kameda, Shinichi Yorozu, Y. Hashimoto, Hirotaka Terai, Akira Fujimaki, Nobuyuki Yoshikawa

Published Jun 1, 2005• 17 citations
Publisher

Abstract

A single-flux-quantum (SFQ) device provides fast operation with low power consumption. As SFQ devices can be applied in network switches requiring high throughput, we have been developing an SFQ network switch system. Not only the switch fabric but also the switch scheduler is a key component for a high-throughput network switch. The switch scheduler orders multiple inputs to a single output at the same time to prevent collisions from occurring in the switch fabric. The scheduling time becomes longer as the number of switch ports increases, because the scheduler must scan requests from all input ports. We designed two types of 4-port arbiters (i.e. switch scheduler sub-circuits) with structures based on serial or parallel processing. We chose to implement and demonstrate the serial arbiter because it has a smaller number of gates. It consisted of about 1800 Josephson junctions, including on-chip test circuitry. We tested a fabricated circuit at high speed and confirmed its correct operation at 40 GHz.

DOI
10.1109/tasc.2005.849865

Related papers

High-Speed Demonstration of Single-Flux-Quantum Cross–Bar Switch up to 50 GHz

Y. Kameda, Shinichi Yorozu, Y. Hashimoto +3 more

We have been developing a single-flux-quantum (SFQ) cross-bar switch, which is a main component of a network packet switch. We think that a network switch is an application in which the high speed of SFQ technology would be advantageous. Anticipating general and large-scale SFQ logic circuit design, we used the cell-based design method and the CONNECT standard SFQ cell library. The two-input and two-output cross-bar switch, a core switch component, consists of 13 logic cells connected by Josephson-transmission-line (JTL) cells. Because of the large size of JTL cells and the large delay in them, timing adjustment becomes more difficult as the operating speed and circuit size increase. After using a commercially available automatic router to find appropriate routes efficiently, we used a static timing analyzer for fine timing adjustment. Timing violations were fixed by changing JTL path delays using the tools we developed. The target operating frequency of the switch was 40 GHz, which corresponds to a clock period of 25 ps. Careful timing adjustment was necessary to ensure correct operations at such a high speed. The test chip was fabricated by using an NEC standard Nb process. The circuit, including on-chip test circuitry, was composed of about 1500 Josephson junctions. We confirmed its correct operations up to 50 GHz with a bias margin of /spl plusmn/20%.

IEEE Transactions on Applied Superconductivity•Mar 1, 2005•15 citations

High-Speed Operation of a Single-Flux-Quantum (SFQ) Cross/Bar Switch up to 35 GHz

義男 亀田, Shinichi Yorozu, Hirotaka Terai +1 more

Single-flux-quantum (SFQ) technology is a novel technology where binary information is represented by a single flux. It enables us to realize high-speed, low-power SFQ logic circuits, surpassing conventional complementary metal-oxide-silicon (CMOS) technology. We proposed an SFQ packet switch to avoid the bottlenecks in broadband networks of the future. To demonstrate high-speed operation of an SFQ logic circuit and its application to our switch architecture, we designed a cross/bar switch. It consists of 13 logic gates and 581 Josephson junctions were used in the layout. We confirmed correct operations up to 33 GHz in simulation. We placed the switch circuit in an on-chip test system for high-speed (over 10 GHz) test. Including I/O circuits, the system as a whole consists of 1236 Josephson junctions. The chip was fabricated by using NEC's standard Nb process. We carried out an on-chip test and found correct operations up to 35 GHz.

Japanese Journal of Applied Physics•Apr 30, 2003•8 citations

A 40GHz clock 160Gb/s 4x4 switch circuit using single flux quantum technology for high-speed packet switching systems

Shinichi Yorozu, Y. Hashimoto, Y. Kameda +3 more

Large-scale telecommunication systems in nationwide networks will require routers having a packet switching throughput capacity of over several-tens of Tb/s. In such future high-end routers, packet switches will need higher processing speeds than semiconductor devices can provide. We have demonstrated a 40 GHz clock, 0.8 mW, 160 Gb/s, 4/spl times/4 switch circuit that uses single flux quantum (SFQ) technology. The main components of an SFQ circuit are Josephson junctions and a superconducting loop. In designing the circuit, we have developed two key technologies: an automatic cell placement and route tool to increase designable circuit scale; a passive interconnection to decrease latency. These technologies will enable implementing Tb/s-scale switches and switch schedulers for high-speed packet switching systems.

IEEE International Conference on High Performance Switching and Routing (HPSR)•Jun 10, 2004•9 citations

40-GHz operation of a single-flux-quantum (SFQ) switch scheduler

Y. Kameda, Shinichi Yorozu, Y. Hashimoto +3 more

This article consists of a collection of slides from the author's conference presentation. Some of the specific areas/topics discussed include: SFQ (single-flex-quantum) circuit technology; Device, circuit, and logic; SFQ network switch application; Switch scheduler implementation; High-speed test scheme; Test results; and Future switch system image using SFQ technology.

IEEE Hot Chips Symposium•Aug 1, 2005•2 citations

Quantitative Evaluation of the Single-Flux- Quantum Cross/Bar Switch

Takahiro Yamada, Masato Yoshida, T. Hanai +6 more

We demonstrated the 4 /spl times/ 4-cross/bar-40 Gbps/ch switch which is functionally compatible with a commercial semiconductor one in order to evaluate the current SFQ circuit technology quantitatively in both a operating speed and power consumption. According to our numerical simulations, the SFQ switch has one or two orders of magnitude higher throughput per a single channel than that of the semiconductor, and has much smaller exchanging times between routing paths. In an actual test based on the NEC Nb-2.5 kA/cm/sup 2/ junction technology, correct operation using an on-chip test system made up of 4700 Josephson junctions was confirmed up to 37 Gbps/ch which is about 14 times faster than the semiconductor of 2.7 Gbps/ch speed. We also confirmed that SFQ circuits consumed 1/800 power compared with those of semiconductor. The reason why data rates obtained experimentally did not reach the designed speed of 40 Gbps/ch is due to both the timing error and the influence of magnetic fields caused by large bias currents exceeding 500 mA. These results of quantitative evaluation show that the SFQ technology has much greater potentials than the semiconductor one in both the operating speed and the power consumption, which means it is very effective to apply the SFQ technology to digital applications.

IEEE Transactions on Applied Superconductivity•Jun 1, 2005•11 citations

60 Gbps throughput demonstration of an asynchronous SFQ-pulse arbitration circuit

Shinichi Yorozu, Y. Kameda, Shuichi Tahara

We demonstrated the experimental operation of a single flux quantum (SFQ) pulse arbitration circuit for rapid single flux quantum (RSFQ) digital applications. The circuit arbitrates two asynchronous incoming signals with the internal clock signal, and produces two signals with a time difference. The circuit consists of two data latches and a clock generator based on a ring oscillator. We fabricated the circuit using NEC's 2-/spl mu/m standard fabrication technology, and tested it in two ways. Firstly we tested throughput characteristics. From measurements of the average voltage of output Josephson Junctions, we confirmed that the throughput was indeed controlled by the clock signal up to around 60-GHz. Secondly we tested the arbitration function. The test used a new testing circuit connected with output side of the arbitration circuit. This circuit consists of a confluence buffer, a splitter and three SFQ/DCs, and was capable of monitoring output signals and their arrival time difference. We changed the difference in arrival times of the input signals to the arbiter circuit, and observed two output signals with the test circuit. The observed signals show that they always sent out with time difference, and we thus confirmed the correct operation of the circuit even for pairs of input signals with the same arrival time.

IEEE Transactions on Applied Superconductivity•Mar 1, 2001•1 citation
A single-flux-quantum (SFQ) device provides fast operation with low power consumption. As SFQ devices can be applied in network switches requiring high throughput, we have been developing an SFQ network switch system. Not only the switch fabric but also the switch scheduler is a key component for a high-throughput network switch. The switch scheduler orders multiple inputs to a single output at the same time to prevent collisions from occurring in the switch fabric. The scheduling time becomes longer as the number of switch ports increases, because the scheduler must scan requests from all input ports. We designed two types of 4-port arbiters (i.e. switch scheduler sub-circuits) with structures based on serial or parallel processing. We chose to implement and demonstrate the serial arbiter because it has a smaller number of gates. It consisted of about 1800 Josephson junctions, including on-chip test circuitry. We tested a fabricated circuit at high speed and confirmed its correct operation at 40 GHz.
We have been developing a single-flux-quantum (SFQ) cross-bar switch, which is a main component of a network packet switch. We think that a network switch is an application in which the high speed of SFQ technology would be advantageous. Anticipating general and large-scale SFQ logic circuit design, we used the cell-based design method and the CONNECT standard SFQ cell library. The two-input and two-output cross-bar switch, a core switch component, consists of 13 logic cells connected by Josephson-transmission-line (JTL) cells. Because of the large size of JTL cells and the large delay in them, timing adjustment becomes more difficult as the operating speed and circuit size increase. After using a commercially available automatic router to find appropriate routes efficiently, we used a static timing analyzer for fine timing adjustment. Timing violations were fixed by changing JTL path delays using the tools we developed. The target operating frequency of the switch was 40 GHz, which corresponds to a clock period of 25 ps. Careful timing adjustment was necessary to ensure correct operations at such a high speed. The test chip was fabricated by using an NEC standard Nb process. The circuit, including on-chip test circuitry, was composed of about 1500 Josephson junctions. We confirmed its correct operations up to 50 GHz with a bias margin of /spl plusmn/20%.
Single-flux-quantum (SFQ) technology is a novel technology where binary information is represented by a single flux. It enables us to realize high-speed, low-power SFQ logic circuits, surpassing conventional complementary metal-oxide-silicon (CMOS) technology. We proposed an SFQ packet switch to avoid the bottlenecks in broadband networks of the future. To demonstrate high-speed operation of an SFQ logic circuit and its application to our switch architecture, we designed a cross/bar switch. It consists of 13 logic gates and 581 Josephson junctions were used in the layout. We confirmed correct operations up to 33 GHz in simulation. We placed the switch circuit in an on-chip test system for high-speed (over 10 GHz) test. Including I/O circuits, the system as a whole consists of 1236 Josephson junctions. The chip was fabricated by using NEC's standard Nb process. We carried out an on-chip test and found correct operations up to 35 GHz.
Large-scale telecommunication systems in nationwide networks will require routers having a packet switching throughput capacity of over several-tens of Tb/s. In such future high-end routers, packet switches will need higher processing speeds than semiconductor devices can provide. We have demonstrated a 40 GHz clock, 0.8 mW, 160 Gb/s, 4/spl times/4 switch circuit that uses single flux quantum (SFQ) technology. The main components of an SFQ circuit are Josephson junctions and a superconducting loop. In designing the circuit, we have developed two key technologies: an automatic cell placement and route tool to increase designable circuit scale; a passive interconnection to decrease latency. These technologies will enable implementing Tb/s-scale switches and switch schedulers for high-speed packet switching systems.
We demonstrated the 4 /spl times/ 4-cross/bar-40 Gbps/ch switch which is functionally compatible with a commercial semiconductor one in order to evaluate the current SFQ circuit technology quantitatively in both a operating speed and power consumption. According to our numerical simulations, the SFQ switch has one or two orders of magnitude higher throughput per a single channel than that of the semiconductor, and has much smaller exchanging times between routing paths. In an actual test based on the NEC Nb-2.5 kA/cm/sup 2/ junction technology, correct operation using an on-chip test system made up of 4700 Josephson junctions was confirmed up to 37 Gbps/ch which is about 14 times faster than the semiconductor of 2.7 Gbps/ch speed. We also confirmed that SFQ circuits consumed 1/800 power compared with those of semiconductor. The reason why data rates obtained experimentally did not reach the designed speed of 40 Gbps/ch is due to both the timing error and the influence of magnetic fields caused by large bias currents exceeding 500 mA. These results of quantitative evaluation show that the SFQ technology has much greater potentials than the semiconductor one in both the operating speed and the power consumption, which means it is very effective to apply the SFQ technology to digital applications.
We demonstrated the experimental operation of a single flux quantum (SFQ) pulse arbitration circuit for rapid single flux quantum (RSFQ) digital applications. The circuit arbitrates two asynchronous incoming signals with the internal clock signal, and produces two signals with a time difference. The circuit consists of two data latches and a clock generator based on a ring oscillator. We fabricated the circuit using NEC's 2-/spl mu/m standard fabrication technology, and tested it in two ways. Firstly we tested throughput characteristics. From measurements of the average voltage of output Josephson Junctions, we confirmed that the throughput was indeed controlled by the clock signal up to around 60-GHz. Secondly we tested the arbitration function. The test used a new testing circuit connected with output side of the arbitration circuit. This circuit consists of a confluence buffer, a splitter and three SFQ/DCs, and was capable of monitoring output signals and their arrival time difference. We changed the difference in arrival times of the input signals to the arbiter circuit, and observed two output signals with the test circuit. The observed signals show that they always sent out with time difference, and we thus confirmed the correct operation of the circuit even for pairs of input signals with the same arrival time.