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Electron spin qubit transport and fault-tolerant architectures for Si:P quantum computing

Lloyd C. L. Hollenberg, Andrew D. Greentree, Cameron J. Wellard, Austin G. Fowler, Simon J. Devitt, Jared H. Cole, Am Stephens

Published Jan 1, 2006• 0 citations

Abstract

Solid state quantum computer architectures are often touted as inherently scalable on the basis of proven classical architecture miniaturisation - i.e. through sheer ease of component replication. However, this weak scaling argument misses the vast complexity of the implementation of fault-tolerant quantum protocols required to protect quantum information processing against errors. In a successful design of strongly scalable quantum computer architecture, highly non-trivial requirements such as qubit transport, logic gates for physically separated qubits, fast read-out and resources for classical processing and error correction must be incorporated. We review a new adiabatic scheme coherent (spin) transport by adiabatic passage (CTAP) for physical qubit transport particularly suited to atomic and solid-state systems. The tunnelling rates, transfer times and the effects of decoherence are calculated for CTAP using phosphorous donors in silicon. Using CTAP qubit transport we have proposed a bi-linear donor electron spin architecture with potential for scale-up to fault-tolerant operation. This architecture allows for the distribution of interaction, storage and readout regions and incorporates non-nearest-neighbour interactions between qubits. The transport rails which provide these non-local interactions, also provide alternative pathways to avoid non-functioning regions. The key questions under investigation are whether one can: perform fault-tolerant quantum computation on such an architecture, and determine quantitative estimates of the fault-tolerant threshold.

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Efficient quantum error correction and fault-tolerant quantum computing require scalable, high-fidelity long-range connectivity. In neutral-atom quantum computers, this is commonly achieved through atom transport, but shuttling introduces latency and motional heating that worsen with system size. Here, we introduce a neutral-atom architecture based on static atomic buses, in which auxiliary mediator atoms enable long-range entangling operations without qubit transport. The architecture naturally supports long-range stabilizer measurements in high-rate LDPC codes and transversal logical gates between neighboring surface-code patches, enabling a modular framework for efficient logical memories, Clifford computation, and magic-state distillation. To realize these capabilities, we co-design optimal-control protocols for bus-mediated controlled-Z gates that incorporate both microscopic neutral-atom dynamics and architectural constraints. We obtain smooth bus-mediated gates with fidelities approaching 99.9% and durations of a few hundred nanoseconds by combining time-optimal control with interaction-flatness and robustness constraints. Large-scale simulations of quantum error correction and logical entangling operations between neighboring surface-code patches predict more than an order-of-magnitude improvement in logical error rates compared with atom-shuttling architectures under realistic noise. The architecture achieves logical gate times of approximately 100 us and quantum-error-correction cycle times of about 1 ms for code distances d<12. These results establish static atomic buses as a practical alternative to atom shuttling for scalable fault-tolerant neutral-atom quantum computing.

Qubit transport has been identified as vital in improving quantum error correction thresholds in scalable quantum computer architectures. Introducing practical transport in the solid-state is problematic, but in phosphorus in silicon implementations we have shown an interesting adiabatic protocol for qubit transfer, coherent tunneling adiabatic passage (CTAP). Here we review the role of CTAP as a quantum wire, highlighting the protocol and the temporal scaling as the length of the transport chain is increased. We also highlight an extension of CTAP to generate spatial superposition states which demonstrates some of the flexibility of quantum electronic structures over quantum optical systems.

Practical quantum computers require a large network of highly coherent qubits, interconnected in a design robust against errors. Donor spins in silicon provide state-of-the-art coherence and quantum gate fidelities, in a platform adapted from industrial semiconductor processing. Here we present a scalable design for a silicon quantum processor that does not require precise donor placement and leaves ample space for the routing of interconnects and readout devices. We introduce the flip-flop qubit, a combination of the electron-nuclear spin states of a phosphorus donor that can be controlled by microwave electric fields. Two-qubit gates exploit a second-order electric dipole-dipole interaction, allowing selective coupling beyond the nearest-neighbor, at separations of hundreds of nanometers, while microwave resonators can extend the entanglement to macroscopic distances. We predict gate fidelities within fault-tolerance thresholds using realistic noise models. This design provides a realizable blueprint for scalable spin-based quantum computers in silicon.Quantum computers will require a large network of coherent qubits, connected in a noise-resilient way. Tosi et al. present a design for a quantum processor based on electron-nuclear spins in silicon, with electrical control and coupling schemes that simplify qubit fabrication and operation.