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IEEE Transactions on Applied Superconductivity

Balanced Comparator for RSFQ Qubit Readout

Thomas Ohki, Alexander M. Savin, Juha Hassel, Leif Grönberg, T. Yu. Karminskaya, Anna Kidiyarova-Shevchenko

Published Jun 1, 2007• 9 citations
Publisher

Abstract

The balanced comparator is an essential part of RSFQ-based readout for superconducting qubits. In this paper we report measurements of the sensitivity of the balanced comparator fabricated in a specialized 30 A/cm2process with 3.6 muA critical currents and measured at 30-500 mK. At sampling frequency of 3.5 GHz the measured gray zone is DeltaI = 104 nA. Due to electron overheating in the shunt resistors the effective noise temperature is 140 mK. The gray zone has a strong dependence on sampling frequency above 5 GHz due to over-clocking. Related measurements have been reported where cooling fins and reduced critical current density of 10 A/cm2were used, and a quantum limited gray zone of 40 nA was achieved. This makes single shot readout possible for the phase, RF-SQUID and persistent current qubits. The readout speed is 30-50 ps, which is quite favorable for error correction schemes.

DOI
10.1109/tasc.2007.897319

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The balanced comparator is an essential part of RSFQ-based readout for superconducting qubits. In this paper we report measurements of the sensitivity of the balanced comparator fabricated in a specialized 30 A/cm2process with 3.6 muA critical currents and measured at 30-500 mK. At sampling frequency of 3.5 GHz the measured gray zone is DeltaI = 104 nA. Due to electron overheating in the shunt resistors the effective noise temperature is 140 mK. The gray zone has a strong dependence on sampling frequency above 5 GHz due to over-clocking. Related measurements have been reported where cooling fins and reduced critical current density of 10 A/cm2were used, and a quantum limited gray zone of 40 nA was achieved. This makes single shot readout possible for the phase, RF-SQUID and persistent current qubits. The readout speed is 30-50 ps, which is quite favorable for error correction schemes.
The Josephson balanced comparator, a decision-making circuit comprising two Josephson junctions (JJs) connected in series from a clocking perspective and in parallel for the current to be measured, is ubiquitous in single flux quantum (SFQ) logic. Its noise properties are crucial for the performance of logic devices. The characteristics of the balanced comparator can also be used to monitor fab process and design implementation as an indicator for excess noise, overheating, linearity, dynamic effects, etc. We designed several test structures to measure gray zone of various comparators fabricated in different nodes of process at MIT-LL. We used digital circuitry to measure comparator characteristics at low frequencies and an analog testbed to perform high frequency characterization. Experimental results for gray zone of comparators designed for fabrication nodes with different current densities, sheet resistances, critical damping are presented and studied as a function of clock frequency.
The Josephson balanced comparator is the key component of Single Flux Quantum logic devices because it is the decision making element. It is formed by two Josephson junctions (JJs) connected in series from a clocking perspective and in parallel for the current to be measured. Its noise properties are crucial for the performance of logic devices. The balanced comparator can also be used to monitor the fab process and design implementation as an indicator of excess noise, overheating, linearity, dynamic effects, etc. We designed several test structures to measure the comparator gray zone at different fabrication process nodes at MIT-LL. We used digital circuitry to measure comparator characteristics at low frequencies. An analog testbed was used to perform high-frequency characterization. Experimental results for different current densities, sheet resistances, damping and clock frequencies are presented.
We evaluated the relationship between the gray zone width and the operating margin for comparators composed of quasi-one-junction superconducting quantum interference devices (QOSs) with shunt resistors, which are often used as high-speed readout circuits in multiple superconductor detector systems. The gray zone width is a good measure of current sensitivity of a single-bit comparator. We numerically analyzed the gray zone width of a QOS comparator and determined the circuit parameters. The gray zone width obtained from the experiments concurred with the results of the numerical analysis and was 2–3 µA at 4.2 K in a QOS comparator composed of three Nb/AlOx/Nb junctions with critical currents of less than 90 µA. The experimentally obtained operating margin for the bias current provided to the comparator was ±15% at the bias current of around 140 µA. These results show that QOS comparators are promising for readout circuits operating up to tens of GHz and imply that gray zone width is the thermal noise in the resistors at 4.2 K.
The balanced comparator, a pair of Josephson junctions, is a key building block and decision-making element for the Rapid Single Flux Quantum (RSFQ) logic cells. The properties of the balanced comparator (BC) define the maximum clock frequency and bit error rate (BER) of RSFQ cells and circuits. Comparators are well characterized by two parameters, the gray zone (GZ) and the gray zone threshold (GZT). Both parameters depend on the dynamic properties of a pair of junctions forming the BC and its surrounding circuitry. In addition, the gray zone depends on the thermal noise in Josephson junctions. The GZ and GZT parameters can be easily measured for various balanced comparators and be used for model-to-hardware correlations. This makes the balanced comparator a unique circuit to validate and calibrate any Josephson simulator by comparing measured and simulated characteristics, including both dynamic and noise properties. In this paper we used a set of balanced comparators designed for the SFQ5ee fabrication process at MIT Lincoln Laboratory to validate and calibrate the Synopsys PrimeSim HSPICE simulator. We were able to match experimental and simulated results and reproduce in simulations the main features observed experimentally and predicted theoretically. A list of recommended design variations to validate a Josephson simulator is provided.
State measurements of flux-based superconducting quantum bits (qubits) require the sensitive discrimination of small differences of magnetic flux, with measurement times short compared to the timescales of coherent quantum mechanical behaviour. The single-flux-quantum (SFQ) superconducting comparator may be the best device for this purpose. An SFQ comparator design using a quasi-one-junction SQUID (QOS) acting as the comparator junction has two advantages over earlier designs—increased sensitivity and the possibility to eliminate shunt resistors. Here we report the first measurements of the sensitivity of an unshunted QOS comparator. The gray zone of this device at 4.2K is 6 mΦo.
The Josephson balanced comparator (BC) is a key component for all RSFQ/ERSFQ logic cells. Its frequency-dependent properties (gray zone and threshold current value) define the maximum clock frequency and bit error rate (BER) of RSFQ/ERSFQ circuits. The balanced comparator can also be used for various monitoring purposes. In this paper, we focus on clock sources and analyze several of them by means of BCs. We show experimentally how local overheating, associated with sub-optimally designed analog clock sources, can compromise the HF performance of a balanced comparator as well as an RFSQ/ERSFQ circuit on the same chip. We also investigate a clock source based on an external HF generator followed by an on-chip DC/SFQ converter and a frequency doubler. We use the balanced comparator's performance to optimize the on-chip part of the clock source at HF. In addition, we verify the advantage of overshunting the comparator driver to achieve higher clock frequency and lower BER. All test circuits were designed for the SFQ5ee fabrication node at MIT-LL, but conclusions can be applied to other fabrication processes.