Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE Transactions on Applied Superconductivity

Design and Operation of a Pulse-Number Multiplier for a High-Precision RSFQ D/A Converter

Motohiro Suzuki, Masaaki Maezawa, Fuminori Hirayama, M. Ochiai

Published Jun 1, 2005• 10 citations
Publisher

Abstract

A pulse-number multiplier (PNM) is a principal subsystem of our rapid single flux quantum digital-to-analog converter for metrology applications. The PNM circuit generates a high-speed pulse train from an input of a precise low-frequency clock signal. We designed, fabricated, and successfully tested a PNM test circuit. The PNM test circuit was implemented by using our standard cell library on 1.6 kA/cm/sup 2/ Nb trilayer technology. Fully functional operation was confirmed by low-speed testing. Experimental bias margins were wider than /spl plusmn/20%, and these results agreed with a simulation. We also tested the circuit by average-voltage measurements for estimating the frequencies of output pulse trains. Results of average-voltage measurements implied that the output frequency of the PNM circuit was tunable from 5 GHz to 17 GHz. The bit error rate (BER) of the PNM circuit was measured, and extrapolation of the error-function fits suggested a sufficiently small BER at the optimum bias point.

DOI
10.1109/tasc.2005.849827

Related papers

Design and Operation of 64-Fold Variable Single-Flux-Quantum Pulse-Number Multiplier

Yoshinao Mizugaki, Jun Saito, Masataka Moriya +1 more

One of the unique applications of the single-flux-quantum (SFQ) circuitry is a digital-to-analog converter (DAC) with fundamental accuracy based on the Josephson effect. Recently, we have proposed a DAC based on frequency modulation of the output SFQ pulse train. A variable SFQ pulse-number multiplier (PNM) is a key component for the frequency-modulation DAC. In this paper, we report our design and test of a variable PNM in which the multiplication factor is determined by the sum of selected SFQ trains coming from a series array of toggle flip-flops. A 64-fold variable PNM is designed and tested using chips based on Nb. The low-speed test shows its correct functions of variable multiplication of one- to 64-fold. The high-speed test demonstrates the operation of output SFQ repetition frequency up to 0.82 GHz for 64-fold multiplication.

IEEE Transactions on Applied Superconductivity•Oct 5, 2011•9 citations

Design and Operation of 1000-fold Voltage Multiplier based on Double-flux-quantum Amplifier

Yusuke Sato, Masataka Moriya, Hiroshi Shimada +2 more

Rapid-single-flux-quantum digital-to-analogue converters (RSFQ-DACs) are now under development for ac voltage standard applications. The voltage multiplier (VM), which precisely amplifies the input voltage, is a key component for RSFQ-DACs. Because the amount of bias current for a conventional VM increases in proportion to its multiplication factor, we have been looking for a VM device which is operated on a different principle. In this paper, we report our design of a 1000-fold VM comprising double flux quantum amplifiers (DFQAs) of which the amount of bias current is independent of its multiplication factor. Test circuits were fabricated using a 2.5 kA/cm2 Nb process. We confirm that the experimental results demonstrate the 1000-fold operation up to 13.2 GHz input SFQ pulse repetition frequency.

Physics Procedia•Jan 1, 2013•14 citations

Design of SFQ-counting analog-to-digital converter

J.C. Lin, Vasili K. Semenov, Konstantin K. Likharev

We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>

IEEE Transactions on Applied Superconductivity•Jun 1, 1995•51 citations

Voltage Doubler Cell for Rapid Single Flux Quantum Digital-to-Analog Converter

Yoko Namatame, Masaaki Maezawa, Masataka Moriya +3 more

Digital-to-analog converters based on rapid single flux quantum circuits (RSFQ-D/A converters) are candidates for the next generation of ac voltage standard. We re-optimized the device parameters of a voltage multiplier (VM) cell, one of the important components in the RSFQ-D/A converter, to implement a new voltage doubler (VD) cell. The output voltage of the VD cell was twice as high as that of the conventional VM cell. We fabricated VD cells using a Nb technology. We confirmed correct operation of the VD cells at input frequencies up to 30 GHz.

Japanese Journal of Applied Physics•Apr 27, 2007•3 citations

RSFQ-based D/A converter for AC voltage standard

Hajime SASAKI, Shogo Kiryu, Fuminori Hirayama +4 more

Digital to analog converters based on the Josephson effect are promising for voltage standards, because they produce voltage steps with ultimate precision and stability. In this paper, we describe a project to develop a Josephson D/A converter designed for synthesizing a sinusoidal waveform with metrological accuracy. The D/A converter is based on RSFQ (Rapid Single Flux Quantum) logic circuits, and consists of a frequency multiplier (FM), a pulse distributor (PD), and a number of voltage multipliers (VMs). Each VM circuit, corresponding to the n-th bit digital code, multiplies the number of SFQ pulses by a factor of 2/sup n/. By gating the input SFQ pulses from the FM to the VMs using the PD circuits, a programmable output voltage is obtained. Possible sources of uncertainties in the measurement of the rms value of the synthesized sine wave are discussed.

IEEE Transactions on Applied Superconductivity•Jun 1, 1999•46 citations

Error Detection Method for RSFQ Voltage Multipliers Using a SQUID Detector

Fuminori Hirayama, Masaaki Maezawa, Motohiro Suzuki +1 more

The voltage multiplier (VM) is a principal component in high-precision digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) circuits. Experimental confirmation of correct operation of the VM is important to guarantee the accuracy of the D/A converter. In this study, a circuit for direct comparison of the output voltages of VMs was designed and demonstrated. An on-chip SQUID sensor was utilized to detect the VM errors. Bit error rates of a single-stage VM were successfully measured down to 10/sup -12/ in the constant-voltage regions. A method of detecting errors during transients was also proposed and carried out.

IEEE Transactions on Applied Superconductivity•Jun 1, 2005•1 citation
A pulse-number multiplier (PNM) is a principal subsystem of our rapid single flux quantum digital-to-analog converter for metrology applications. The PNM circuit generates a high-speed pulse train from an input of a precise low-frequency clock signal. We designed, fabricated, and successfully tested a PNM test circuit. The PNM test circuit was implemented by using our standard cell library on 1.6 kA/cm/sup 2/ Nb trilayer technology. Fully functional operation was confirmed by low-speed testing. Experimental bias margins were wider than /spl plusmn/20%, and these results agreed with a simulation. We also tested the circuit by average-voltage measurements for estimating the frequencies of output pulse trains. Results of average-voltage measurements implied that the output frequency of the PNM circuit was tunable from 5 GHz to 17 GHz. The bit error rate (BER) of the PNM circuit was measured, and extrapolation of the error-function fits suggested a sufficiently small BER at the optimum bias point.
One of the unique applications of the single-flux-quantum (SFQ) circuitry is a digital-to-analog converter (DAC) with fundamental accuracy based on the Josephson effect. Recently, we have proposed a DAC based on frequency modulation of the output SFQ pulse train. A variable SFQ pulse-number multiplier (PNM) is a key component for the frequency-modulation DAC. In this paper, we report our design and test of a variable PNM in which the multiplication factor is determined by the sum of selected SFQ trains coming from a series array of toggle flip-flops. A 64-fold variable PNM is designed and tested using chips based on Nb. The low-speed test shows its correct functions of variable multiplication of one- to 64-fold. The high-speed test demonstrates the operation of output SFQ repetition frequency up to 0.82 GHz for 64-fold multiplication.
Rapid-single-flux-quantum digital-to-analogue converters (RSFQ-DACs) are now under development for ac voltage standard applications. The voltage multiplier (VM), which precisely amplifies the input voltage, is a key component for RSFQ-DACs. Because the amount of bias current for a conventional VM increases in proportion to its multiplication factor, we have been looking for a VM device which is operated on a different principle. In this paper, we report our design of a 1000-fold VM comprising double flux quantum amplifiers (DFQAs) of which the amount of bias current is independent of its multiplication factor. Test circuits were fabricated using a 2.5 kA/cm2 Nb process. We confirm that the experimental results demonstrate the 1000-fold operation up to 13.2 GHz input SFQ pulse repetition frequency.
We describe the design of an oversampling single-flux-counting analog-to-digital converter with the estimated bandwidth of a few tens of MHz, based on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an input analog circuit, high-speed quantizer with an original analog/digital negative feedback loop, decimation (comb) filter, and supporting subsystems including clock distribution circuits, quantization signal conditioner, and output drivers. We have applied a new approach, the 'symmetrizing' negative feedback, to free the quantizer from the intrinsic hysteresis without dynamic range sacrifice. The 16-bit version of the system comprises about 1,500 Josephson junctions and consumes 1.2 mW of DC power, when implemented using Nb-trilayer technology with 1 kA/cm/sup 2/, 3.5 /spl mu/m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.>
Digital-to-analog converters based on rapid single flux quantum circuits (RSFQ-D/A converters) are candidates for the next generation of ac voltage standard. We re-optimized the device parameters of a voltage multiplier (VM) cell, one of the important components in the RSFQ-D/A converter, to implement a new voltage doubler (VD) cell. The output voltage of the VD cell was twice as high as that of the conventional VM cell. We fabricated VD cells using a Nb technology. We confirmed correct operation of the VD cells at input frequencies up to 30 GHz.
Digital to analog converters based on the Josephson effect are promising for voltage standards, because they produce voltage steps with ultimate precision and stability. In this paper, we describe a project to develop a Josephson D/A converter designed for synthesizing a sinusoidal waveform with metrological accuracy. The D/A converter is based on RSFQ (Rapid Single Flux Quantum) logic circuits, and consists of a frequency multiplier (FM), a pulse distributor (PD), and a number of voltage multipliers (VMs). Each VM circuit, corresponding to the n-th bit digital code, multiplies the number of SFQ pulses by a factor of 2/sup n/. By gating the input SFQ pulses from the FM to the VMs using the PD circuits, a programmable output voltage is obtained. Possible sources of uncertainties in the measurement of the rms value of the synthesized sine wave are discussed.
The voltage multiplier (VM) is a principal component in high-precision digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) circuits. Experimental confirmation of correct operation of the VM is important to guarantee the accuracy of the D/A converter. In this study, a circuit for direct comparison of the output voltages of VMs was designed and demonstrated. An on-chip SQUID sensor was utilized to detect the VM errors. Bit error rates of a single-stage VM were successfully measured down to 10/sup -12/ in the constant-voltage regions. A method of detecting errors during transients was also proposed and carried out.