Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE Transactions on Applied Superconductivity

Progress of Single Flux Quantum Packet Switch Technology

Shinichi Yorozu, Y. Kameda, Y. Hashimoto, Hirotaka Terai, Akira Fujimaki, Nobuyuki Yoshikawa

Published Jun 1, 2005• 13 citations
Publisher

Abstract

With regard to sustaining future capacity of network traffic, the current hardware technology has a big bottleneck in terms of power consumption and insufficient operation speed. To overcome this bottleneck, we have developed a single flux quantum (SFQ) packet-switching circuit. We report recent progress in developing the SFQ packet-switching application. First, we demonstrate a 40 GHz, 160 Gb/s, 4 /spl times/ 4 packet switching circuit, which is currently the fastest clock frequency reported packet switch. Then, we describe a currently possible switching module using SFQ technology. Finally, we consider how SFQ technology can be used to scale the packet-switching capacity up to 100 Tbps.

DOI
10.1109/tasc.2005.849862

Related papers

A 40GHz clock 160Gb/s 4x4 switch circuit using single flux quantum technology for high-speed packet switching systems

Shinichi Yorozu, Y. Hashimoto, Y. Kameda +3 more

Large-scale telecommunication systems in nationwide networks will require routers having a packet switching throughput capacity of over several-tens of Tb/s. In such future high-end routers, packet switches will need higher processing speeds than semiconductor devices can provide. We have demonstrated a 40 GHz clock, 0.8 mW, 160 Gb/s, 4/spl times/4 switch circuit that uses single flux quantum (SFQ) technology. The main components of an SFQ circuit are Josephson junctions and a superconducting loop. In designing the circuit, we have developed two key technologies: an automatic cell placement and route tool to increase designable circuit scale; a passive interconnection to decrease latency. These technologies will enable implementing Tb/s-scale switches and switch schedulers for high-speed packet switching systems.

IEEE International Conference on High Performance Switching and Routing (HPSR)•Jun 10, 2004•9 citations

Progress of RSFQ High Performance Packet Switch

Shinichi Yorozu, Yoshihito Hashimoto, 義男 亀田 +1 more

Internet traffic loads are increasing. Sustaining packet switching throughput of a core node will be difficult. A major reason for this is power consumption and packaging volume. As long as we use only current semiconductor technology, the switching capacity will be limited. Rapid single flux quantum (RSFQ) superconducting technology can overcome such difficulties because of high-speed operation and low-power consumption characteristics. A superconducting wiring also enables high-speed inter-chip communication. We report on progress on packet switch circuit implementation and cryo-cooled packaging for a RSFQ packet switch system. In addition, we discuss a possible packet switch architecture over 100 Tbps that uses RSFQ technology.

Advances in science and technology•Oct 1, 2006•0 citations

High-Speed Operation of a Single-Flux-Quantum (SFQ) Cross/Bar Switch up to 35 GHz

義男 亀田, Shinichi Yorozu, Hirotaka Terai +1 more

Single-flux-quantum (SFQ) technology is a novel technology where binary information is represented by a single flux. It enables us to realize high-speed, low-power SFQ logic circuits, surpassing conventional complementary metal-oxide-silicon (CMOS) technology. We proposed an SFQ packet switch to avoid the bottlenecks in broadband networks of the future. To demonstrate high-speed operation of an SFQ logic circuit and its application to our switch architecture, we designed a cross/bar switch. It consists of 13 logic gates and 581 Josephson junctions were used in the layout. We confirmed correct operations up to 33 GHz in simulation. We placed the switch circuit in an on-chip test system for high-speed (over 10 GHz) test. Including I/O circuits, the system as a whole consists of 1236 Josephson junctions. The chip was fabricated by using NEC's standard Nb process. We carried out an on-chip test and found correct operations up to 35 GHz.

Japanese Journal of Applied Physics•Apr 30, 2003•8 citations

Single flux quantum packet switch circuits for large-scale communication systems

Shinichi Yorozu, Y. Kameda, Y. Hashimoto +1 more

Large-scale telecommunication systems in the larger nationwide network of the next decade will require routers having a packet switching throughput capacity of over several-tens Tbps. In such future high-end routers, the packet switch, which is the biggest bottleneck of the router, will need higher processing speeds than semiconductor devices. In this paper, we describe an SFQ packet switch architecture that is used in the internal speed-up Banyan network. According to the architecture we have designed and demonstrated a deep-pipelined 2/spl times/2 packet switch logic circuit, which is the key element in a packet switch, by applying two technological advances regarding design methodology and packaging. This circuit is among the largest SFQ random logic circuits yet reported.

IEEE Transactions on Applied Superconductivity•Jun 1, 2003•7 citations

Superconducting Digital Electronics Based on Single Flux Quantum

Hisao Hayakawa

Single flux quantum (SFQ) logic circuits, in which a single flux quantum is used for an information carrier, have a possibility to open a new digital system operated with over 100 GHz clock frequencies at extremely low power dissipations. Recently, much progress in basic technologies for designing SFQ circuits and operating circuits with high speeds has been done. By taking advancements in these designing tools, circuits including more than several thousands junctions easily operated with the clock frequency of more than several tens GHz. Applications of SFQ circuits such as high performance computers, high end router and high end servers are being developed in the world taking advantages of the high through-put nature and the low power dissipation of the SFQ logic.

Chinese Journal of Physics•Aug 1, 2004•0 citations

High-Speed Demonstration of Single-Flux-Quantum Cross–Bar Switch up to 50 GHz

Y. Kameda, Shinichi Yorozu, Y. Hashimoto +3 more

We have been developing a single-flux-quantum (SFQ) cross-bar switch, which is a main component of a network packet switch. We think that a network switch is an application in which the high speed of SFQ technology would be advantageous. Anticipating general and large-scale SFQ logic circuit design, we used the cell-based design method and the CONNECT standard SFQ cell library. The two-input and two-output cross-bar switch, a core switch component, consists of 13 logic cells connected by Josephson-transmission-line (JTL) cells. Because of the large size of JTL cells and the large delay in them, timing adjustment becomes more difficult as the operating speed and circuit size increase. After using a commercially available automatic router to find appropriate routes efficiently, we used a static timing analyzer for fine timing adjustment. Timing violations were fixed by changing JTL path delays using the tools we developed. The target operating frequency of the switch was 40 GHz, which corresponds to a clock period of 25 ps. Careful timing adjustment was necessary to ensure correct operations at such a high speed. The test chip was fabricated by using an NEC standard Nb process. The circuit, including on-chip test circuitry, was composed of about 1500 Josephson junctions. We confirmed its correct operations up to 50 GHz with a bias margin of /spl plusmn/20%.

IEEE Transactions on Applied Superconductivity•Mar 1, 2005•15 citations
With regard to sustaining future capacity of network traffic, the current hardware technology has a big bottleneck in terms of power consumption and insufficient operation speed. To overcome this bottleneck, we have developed a single flux quantum (SFQ) packet-switching circuit. We report recent progress in developing the SFQ packet-switching application. First, we demonstrate a 40 GHz, 160 Gb/s, 4 /spl times/ 4 packet switching circuit, which is currently the fastest clock frequency reported packet switch. Then, we describe a currently possible switching module using SFQ technology. Finally, we consider how SFQ technology can be used to scale the packet-switching capacity up to 100 Tbps.
Large-scale telecommunication systems in nationwide networks will require routers having a packet switching throughput capacity of over several-tens of Tb/s. In such future high-end routers, packet switches will need higher processing speeds than semiconductor devices can provide. We have demonstrated a 40 GHz clock, 0.8 mW, 160 Gb/s, 4/spl times/4 switch circuit that uses single flux quantum (SFQ) technology. The main components of an SFQ circuit are Josephson junctions and a superconducting loop. In designing the circuit, we have developed two key technologies: an automatic cell placement and route tool to increase designable circuit scale; a passive interconnection to decrease latency. These technologies will enable implementing Tb/s-scale switches and switch schedulers for high-speed packet switching systems.
Internet traffic loads are increasing. Sustaining packet switching throughput of a core node will be difficult. A major reason for this is power consumption and packaging volume. As long as we use only current semiconductor technology, the switching capacity will be limited. Rapid single flux quantum (RSFQ) superconducting technology can overcome such difficulties because of high-speed operation and low-power consumption characteristics. A superconducting wiring also enables high-speed inter-chip communication. We report on progress on packet switch circuit implementation and cryo-cooled packaging for a RSFQ packet switch system. In addition, we discuss a possible packet switch architecture over 100 Tbps that uses RSFQ technology.
Single-flux-quantum (SFQ) technology is a novel technology where binary information is represented by a single flux. It enables us to realize high-speed, low-power SFQ logic circuits, surpassing conventional complementary metal-oxide-silicon (CMOS) technology. We proposed an SFQ packet switch to avoid the bottlenecks in broadband networks of the future. To demonstrate high-speed operation of an SFQ logic circuit and its application to our switch architecture, we designed a cross/bar switch. It consists of 13 logic gates and 581 Josephson junctions were used in the layout. We confirmed correct operations up to 33 GHz in simulation. We placed the switch circuit in an on-chip test system for high-speed (over 10 GHz) test. Including I/O circuits, the system as a whole consists of 1236 Josephson junctions. The chip was fabricated by using NEC's standard Nb process. We carried out an on-chip test and found correct operations up to 35 GHz.
Large-scale telecommunication systems in the larger nationwide network of the next decade will require routers having a packet switching throughput capacity of over several-tens Tbps. In such future high-end routers, the packet switch, which is the biggest bottleneck of the router, will need higher processing speeds than semiconductor devices. In this paper, we describe an SFQ packet switch architecture that is used in the internal speed-up Banyan network. According to the architecture we have designed and demonstrated a deep-pipelined 2/spl times/2 packet switch logic circuit, which is the key element in a packet switch, by applying two technological advances regarding design methodology and packaging. This circuit is among the largest SFQ random logic circuits yet reported.
Single flux quantum (SFQ) logic circuits, in which a single flux quantum is used for an information carrier, have a possibility to open a new digital system operated with over 100 GHz clock frequencies at extremely low power dissipations. Recently, much progress in basic technologies for designing SFQ circuits and operating circuits with high speeds has been done. By taking advancements in these designing tools, circuits including more than several thousands junctions easily operated with the clock frequency of more than several tens GHz. Applications of SFQ circuits such as high performance computers, high end router and high end servers are being developed in the world taking advantages of the high through-put nature and the low power dissipation of the SFQ logic.
We have been developing a single-flux-quantum (SFQ) cross-bar switch, which is a main component of a network packet switch. We think that a network switch is an application in which the high speed of SFQ technology would be advantageous. Anticipating general and large-scale SFQ logic circuit design, we used the cell-based design method and the CONNECT standard SFQ cell library. The two-input and two-output cross-bar switch, a core switch component, consists of 13 logic cells connected by Josephson-transmission-line (JTL) cells. Because of the large size of JTL cells and the large delay in them, timing adjustment becomes more difficult as the operating speed and circuit size increase. After using a commercially available automatic router to find appropriate routes efficiently, we used a static timing analyzer for fine timing adjustment. Timing violations were fixed by changing JTL path delays using the tools we developed. The target operating frequency of the switch was 40 GHz, which corresponds to a clock period of 25 ps. Careful timing adjustment was necessary to ensure correct operations at such a high speed. The test chip was fabricated by using an NEC standard Nb process. The circuit, including on-chip test circuitry, was composed of about 1500 Josephson junctions. We confirmed its correct operations up to 50 GHz with a bias margin of /spl plusmn/20%.