Quantum Bit and Square Well in Quantum Computation

Stanley Gudder

Alexis De Vos, Jan De Beule, Leo Storme

To the two classical reversible 1-bit logic gates, i.e. the identity gate (a.k.a. the follower) and the NOT gate (a.k.a. the inverter), we add an extra gate, the square root of NOT. Similarly, we add to the 24 classical reversible 2-bit circuits, both the square root of NOT and the controlled square root of NOT. This leads to a new kind of calculus, situated between classical reversible computing and quantum computing.

Bettina Just

Arindam Banerjee, Debesh Kumar Das

Digital multipliers are indispensable in Digital signal processing and cryptography. In many mathematical computations, squaring and cubing are frequently used. Generally the multiplier is used in computing square. But the implementation of squaring has the advantage that we can avoid the generation of many partial products used in multipliers by eliminating the redundant bits, thus resulting the circuit to be simpler with less hardware, propagation delay and power consumption. Our work proposes two designs of dedicated squaring techniques in reversible circuits. We use the recursion to achieve our design. The design for n bits is recursively obtained by appending some extra circuitry with the design for (n-1) bits. Our techniques make optimum use of ancillary inputs, garbage outputs and quantum cost and compare favourably with the recent work [1] in this area. Both the designs are having modular structures and can be systemically designed.

Vlatko Vedral, Martin Bodo Plenio

Sayeeda Sultana, Katarzyna Radecka

In this paper we present a novel reversible implementation of a square-root circuit with an array structure. In scientific computations such as numerical analysis, computer graphics, complex number computations, square root is an important operation. In classical irreversible arena we find different realizations of square root circuit. Since reversible circuit is emerging as an alternative to classical circuit, here we introduce a novel reversible realization of this operation. As a basic module, we propose a reversible controlled adder/subtractor (RCAS) block based on 2's Complement computation. In our design we use an array of such RCAS blocks which perform addition or subtraction based on the result generated from digit-by-digit square root operation. To our best knowledge this is the first methodical approach for implementing reversible square root circuit. The new structure of the circuit and different parameters - number of gates, garbage bits and quantum cost for n-bit realization is presented here.