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International Conference on Consumer Electronics, Communications and Networks (CECNet)

A serial concatenated scheme for LDPC code to achieve better error correction performance

Zhe Wang, Meng Zhang

Published Apr 1, 2012• 6 citations
Publisher

Abstract

Low Density Parity Check(LDPC) Codes is a class of approaching limits error correction codes which has gained widely application in communications. The excellent performance, however, is the result of a large number of repeatedly conducting iterative decoding algorithm, and is apt to be seriously affected by small girth in the parity check matrix. In this paper we present a novel serial concatenated scheme for LDPC codes which utilize much smaller generation matrix and the interleaver to reduce possibilities of girth, thus reducing the number of iterations in decoding. Simulation shows that the new codes have better performance while less requirement of iterations.

DOI
10.1109/cecnet.2012.6202087

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Low Density Parity Check(LDPC) Codes is a class of approaching limits error correction codes which has gained widely application in communications. The excellent performance, however, is the result of a large number of repeatedly conducting iterative decoding algorithm, and is apt to be seriously affected by small girth in the parity check matrix. In this paper we present a novel serial concatenated scheme for LDPC codes which utilize much smaller generation matrix and the interleaver to reduce possibilities of girth, thus reducing the number of iterations in decoding. Simulation shows that the new codes have better performance while less requirement of iterations.
Concatenated codes are effectively used in different approaches of error-correcting theory. We suggest new concatenated code construction that is composed of outer LDPC code and a particular designed inner LDPC code. Special optimization procedure was developed to obtain inner code with specific error-correcting characteristics. We apply the decoder of woven codes to this construction, while reducing the complexity of decoding procedure compared to a classic decoder of LDPC code. Furthermore, we improve the performance of our scheme with puncturing the code symbols. The resulting concatenated construction outperforms low-rate LDPC from the 5G standard. Besides this, we demonstrate the performance of code with a special parity-check matrix consisting of parity-check matrices of inner and outer codes from our suggested construction.
Nowadays concatenated codes are actively developed for different applications of error-correcting theory. In this paper we propose a new method for constructing concatenated codes consisting of some outer error-correcting code and a particular designed inner low-density parity-check (LDPC) code. We consider polarization-adjusted convolutional (PAC) code and LDPC code as outer code of suggested construction. A specialized optimization algorithm was developed to generate inner code with particular error-reducing properties. By using the woven codes decoder with this design, the complexity of the decoding procedure is reduced compared to traditional polar and LDPC codes decoders, while still providing error-correcting characteristics. Additionally, we enhance the performance of our system by puncturing the encoded symbols. The resulting concatenated constructions outperform low-rate LDPC code from the 5G standard and polar code. Furthermore, we demonstrate the performance of code with a special paritycheck matrix which consists of parity-check matrices of inner and outer codes from our proposed construction.
—Low-density parity-check (LDPC) codes have been shown to deliver capacity approaching performance; however, problematic graphical structures (e.g. trapping sets) in the Tanner graph of some LDPC codes can cause high error floors in bit-errorratio (BER) performance under conventional sum-product algorithm (SPA). This paper presents a serial concatenation scheme to avoid the trapping sets and to lower the error floors of LDPC code. The outer code in the proposed concatenation is the LDPC, and the inner code is a high rate array code. This approach applies an interactive hybrid process between the BCJR decoding for the array code and the SPA for the LDPC code together with bit-pinning and bit-flipping techniques. Margulis code of size (2640, 1320) has been used for the simulation and it has been shown that the proposed concatenation and decoding scheme can considerably improve the error floor performance with minimal rate loss
The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum–product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of 10−8. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.
—Low-density parity-check (LDPC) codes have been shown to deliver capacity approaching performance; however, problematic graphical structures (e.g. trapping sets) in the Tanner graph of some LDPC codes can cause high error floors in bit-errorratio (BER) performance under conventional sum-product algorithm (SPA). This paper presents a serial concatenation scheme to avoid the trapping sets and to lower the error floors of LDPC code. The outer code in the proposed concatenation is the LDPC, and the inner code is a high rate array code. This approach applies an interactive hybrid process between the BCJR decoding for the array code and the SPA for the LDPC code together with bit-pinning and bit-flipping techniques. Margulis code of size (2640, 1320) has been used for the simulation and it has been shown that the proposed concatenation and decoding scheme can considerably improve the error floor performance with minimal rate loss
Despite the performance of 5th Generation Low Density Parity Check (5G-LDPC) codes close to the capacity limit, the near-optimal floating-point BP decoding will lead to excessive use of hardware and high complexity of calculation. Thus, the quantized min-sum decoder with limited-precision is usually used in practical implementations. No matter using high or low precision quantization, some 5G-LDPC codes always suffer from the problem of high error floor, which affects their applications in future ultra-reliable scenarios. Using Reed-Solomon (RS) codes as the outer codes can significantly lower the error floor of 5G-LDPC codes due to their Hamming distance properties and excellent error-correction capability. In order to further improve the overall performance, an efficient iterative decoding algorithm of RS-LDPC concatenated codes is proposed in this paper. The proposed iterative algorithm of RS-LDPC codes can achieve noticeable gains over the 5G-LDPC codes at lower FER.