Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Advanced materials research

A Min-Sum Algorithm Suitable for Hardware Implementation Based on LDPC Codes

Rui Ping Chen, Zhong Xun Wang, Xin Qiao Yu

Published Jul 1, 2011• 0 citations
Publisher

Abstract

Decoding algorithms with strong practical value not only have good decoding performance, but also have the computation complexity as low as possible. For this purpose, the paper points out the modified min-sum decoding algorithm(M-MSA). On the condition of no increasing in the decoding complexity, it makes the error-correcting performance improved by adding the appropriate scaling factor based on the min-sum algorithm(MSA), and it is very suitable for hardware implementation. Simulation results show that this algorithm has good BER performance, low complexity and low hardware resource utilization, and it would be well applied in the future.

DOI
10.4028/www.scientific.net/amr.271-273.458

Related papers

A Modified Min Sum Decoding Algorithm based on Approximation Enhancement for LDPC Codes

Nam Il Kim, Seung-Que Lee, Jin-Up Kim

Min-sum algorithm(MSA) and its modification are used in LDPC decoder implementations because of its error performance and low computation complexity. In this paper a modified min-sum LDPC decoding algorithm through approximation enhancement using the smallest three minimum values is presented. The proposed algorithm improves error performance and reduces decoder iterations. From the simulation results for 5G NR LDPC codes, we show that the proposed algorithm can achieve about 1.6dB improvement of FER compared to the min-sum decoding algorithm and provide about 10% reduction of the average iteration numbers compare to NMSA with optimum normalization factor.

International Conference on Information and Communication Technology Convergence (ICTC)•Oct 21, 2020•6 citations

A low-complexity high-performance decoding algorithm for fixed-point LDPC decoders

Jui-Hui Hung, Sau-Gee Chen

The bit-error-rate (BER) performance of an LDPC decoding algorithm will be seriously degraded when the algorithm is realized with fixed-point implementation in practical applications, due to the introduced quantization errors and rounding errors. To remedy the problem, this paper proposes an improved min-sum algorithm (MSA), called CMVP algorithm. It achieves better performances than the popular min-sum algorithm (MSA), under the condition of the same fixed-point precision. Besides, the hardware overhead of the new algorithm over conventional MSA is small. On the other hand, under the condition of comparable performances, MSA algorithm needs a higher fixed-point precision and hardware costs than the new CMVP algorithm, according to the simulations and hardware synthesis results. The new algorithm also works well in a wide range of code rates and code lengths.

International Conference on Signal Processing and Communication Systems•Dec 1, 2008•2 citations

A Modified Normalized Min - Sum Decoding Algorithm for Irregular LDPC Codes

Michaelraj Kingston Roberts, Ramesh Jayabalan

In this paper, a modified normalized Min-Sum algorithm (MNMSA) is proposed for decoding irregular Low Density Parity Check Codes (LDPC) with non-uniform degree distribution. The proposed algorithm provides an efficient decoding scheme to enhance the error performance of an irregular LDPC code without increasing the hardware complexity. An efficient 6- bit quantization scheme is utilized in the proposed algorithm with optimally combined normalization and down scaling factors to resolve the magnitude overestimation issue which occurs during iterative message passing process between the nodes. The simulation results demonstrate that the proposed algorithm achieves good decoding performance in terms of Frame Error Rate (FER) and Bit Error Rate (BER) without the requirement of complex arithmetic calculations. Compared to other min- sum based decoding algorithms the decoding process of the proposed MNMSA requires only fewer decoding iterations over wide range of signal- to- noise ratio (SNR) to achieve comparable decoding performance to that of Belief Propagation (BP) algorithm without increasing the hardware complexity.

•Jan 1, 2014•3 citations

A low-complex Min-Sum decoding algorithm for irregular LDPC codes

Michaelraj Kingston Roberts, Maria Falaq

This paper presents a low complexity Min-Sum algorithm for decoding irregular Low-Density Parity-Check (LDPC) codes. In the proposed algorithm, the significant improvement in the error correcting performance without enhancing the hardware complexity is achieved by employing adaptive and optimized normalization factors for both the extrinsic information and log-likelihood ratio data bits respectively. The experimental results demonstrate that the proposed algorithm with 6-bit non-uniform quantization achieves reasonable decoding performance in terms of Frame Error Rate (FER) and Bit Error Rate (BER) without increasing the hardware complexity by avoiding finite word length effects of soft information.

International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET)•Mar 1, 2016•3 citations

A modified Offset Min-Sum decoding algorithm for LDPC codes

Meng Xu, Jianhui Wu, Meng Zhang

In this paper a modified Offset Min-Sum decoding algorithm for Low-Density Parity Check Codes is presented. In this modified algorithm, the offset factor in the original Offset Min-Sum algorithm is adjusted iteratively with the assistance of the check-node computation outputs of the Normalized Min-Sum algorithm. As a result, the offset factor in our modified algorithm can be calculated adaptively and more efficiently according to the previous decoding procedure, which can minimize the decoding degradation compared with the Belief Propagation decoding algorithm. The simulation results show that, compared with the original Offset Min-Sum decoding algorithm, our modified algorithm can achieve noticeable performance improvement with minor extra hardware complexity. For example, when BER is 10−5, our algorithm can achieve 0.1dB and 0.2dB decoding gain over Offset Min-Sum algorithm for regular and irregular LDPC codes respectively.

•Jul 1, 2010•29 citations

Hardware Implementation Analysis of Min-Sum Decoders

Rajagopal Anantharaman, Karibasappa Kwadiki, Vasundara Patel Kerehalli Shankar Rao

The objective of this work is to propose a modified Min-Sum decoding Low Density Parity Check (LDPC) algorithm and perform the hardware implementation analysis of Min-Sum, optimized Min-Sum and modified Min-Sum decoders. The Min-Sum algorithm mainly uses the process of finding the minimum and addition. Hence the number of multiplications is drastically reduced which helps in reducing the complexity of implementation. Adding an optimisation factor to the decoder increases the accuracy and reduces the number of iterations required to compute the decoded message. Hence the process of optimisation reduces the overall decoding time required. Modified Min-Sum algorithm is proposed to further improve the performance by decreasing the number of stages in the decoding process which reduces the complexity in Field Programmable Gate Array (FPGA) implementation.

Advances in Electrical and Electronic Engineering•Jun 22, 2019•5 citations
Decoding algorithms with strong practical value not only have good decoding performance, but also have the computation complexity as low as possible. For this purpose, the paper points out the modified min-sum decoding algorithm(M-MSA). On the condition of no increasing in the decoding complexity, it makes the error-correcting performance improved by adding the appropriate scaling factor based on the min-sum algorithm(MSA), and it is very suitable for hardware implementation. Simulation results show that this algorithm has good BER performance, low complexity and low hardware resource utilization, and it would be well applied in the future.
Min-sum algorithm(MSA) and its modification are used in LDPC decoder implementations because of its error performance and low computation complexity. In this paper a modified min-sum LDPC decoding algorithm through approximation enhancement using the smallest three minimum values is presented. The proposed algorithm improves error performance and reduces decoder iterations. From the simulation results for 5G NR LDPC codes, we show that the proposed algorithm can achieve about 1.6dB improvement of FER compared to the min-sum decoding algorithm and provide about 10% reduction of the average iteration numbers compare to NMSA with optimum normalization factor.
The bit-error-rate (BER) performance of an LDPC decoding algorithm will be seriously degraded when the algorithm is realized with fixed-point implementation in practical applications, due to the introduced quantization errors and rounding errors. To remedy the problem, this paper proposes an improved min-sum algorithm (MSA), called CMVP algorithm. It achieves better performances than the popular min-sum algorithm (MSA), under the condition of the same fixed-point precision. Besides, the hardware overhead of the new algorithm over conventional MSA is small. On the other hand, under the condition of comparable performances, MSA algorithm needs a higher fixed-point precision and hardware costs than the new CMVP algorithm, according to the simulations and hardware synthesis results. The new algorithm also works well in a wide range of code rates and code lengths.
In this paper, a modified normalized Min-Sum algorithm (MNMSA) is proposed for decoding irregular Low Density Parity Check Codes (LDPC) with non-uniform degree distribution. The proposed algorithm provides an efficient decoding scheme to enhance the error performance of an irregular LDPC code without increasing the hardware complexity. An efficient 6- bit quantization scheme is utilized in the proposed algorithm with optimally combined normalization and down scaling factors to resolve the magnitude overestimation issue which occurs during iterative message passing process between the nodes. The simulation results demonstrate that the proposed algorithm achieves good decoding performance in terms of Frame Error Rate (FER) and Bit Error Rate (BER) without the requirement of complex arithmetic calculations. Compared to other min- sum based decoding algorithms the decoding process of the proposed MNMSA requires only fewer decoding iterations over wide range of signal- to- noise ratio (SNR) to achieve comparable decoding performance to that of Belief Propagation (BP) algorithm without increasing the hardware complexity.
This paper presents a low complexity Min-Sum algorithm for decoding irregular Low-Density Parity-Check (LDPC) codes. In the proposed algorithm, the significant improvement in the error correcting performance without enhancing the hardware complexity is achieved by employing adaptive and optimized normalization factors for both the extrinsic information and log-likelihood ratio data bits respectively. The experimental results demonstrate that the proposed algorithm with 6-bit non-uniform quantization achieves reasonable decoding performance in terms of Frame Error Rate (FER) and Bit Error Rate (BER) without increasing the hardware complexity by avoiding finite word length effects of soft information.
In this paper a modified Offset Min-Sum decoding algorithm for Low-Density Parity Check Codes is presented. In this modified algorithm, the offset factor in the original Offset Min-Sum algorithm is adjusted iteratively with the assistance of the check-node computation outputs of the Normalized Min-Sum algorithm. As a result, the offset factor in our modified algorithm can be calculated adaptively and more efficiently according to the previous decoding procedure, which can minimize the decoding degradation compared with the Belief Propagation decoding algorithm. The simulation results show that, compared with the original Offset Min-Sum decoding algorithm, our modified algorithm can achieve noticeable performance improvement with minor extra hardware complexity. For example, when BER is 10−5, our algorithm can achieve 0.1dB and 0.2dB decoding gain over Offset Min-Sum algorithm for regular and irregular LDPC codes respectively.
The objective of this work is to propose a modified Min-Sum decoding Low Density Parity Check (LDPC) algorithm and perform the hardware implementation analysis of Min-Sum, optimized Min-Sum and modified Min-Sum decoders. The Min-Sum algorithm mainly uses the process of finding the minimum and addition. Hence the number of multiplications is drastically reduced which helps in reducing the complexity of implementation. Adding an optimisation factor to the decoder increases the accuracy and reduces the number of iterations required to compute the decoded message. Hence the process of optimisation reduces the overall decoding time required. Modified Min-Sum algorithm is proposed to further improve the performance by decreasing the number of stages in the decoding process which reduces the complexity in Field Programmable Gate Array (FPGA) implementation.