IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences

Complexity-Reducing Algorithm for Serial Scheduled Min-Sum Decoding of LDPC Codes

Hironori Uchikawa, Kohsuke Harada

Published Jan 1, 2009• 1 citation

Abstract

We propose a complexity-reducing algorithm for serial scheduled min-sum decoding that reduces the number of check nodes to process during an iteration. The check nodes to skip are chosen based on the reliability, a syndrome and a log-likelihood-ratio (LLR) value, of the incoming messages. The proposed algorithm is evaluated by computer simulations and shown to reduce the decoding complexity about 20% compared with a conventional serial scheduled min-sum decoding with small fractional decibel degradation in error correction performance.

DOI: 10.1587/transfun.e92.a.2411

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