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Russian Microelectronics

Quantum noise and the quality control of hardware components of quantum computers based on superconducting phase qubits

Yu. I. Bogdanov, Vladimir F. Lukichev, S. A. Nuyanzin, Alexander A. Orlikovsky

Published Nov 1, 2012• 6 citations
Publisher

Abstract

A general approach to the provision of the quality and efficiency of quantum information technologies is proposed. The approach is based on the analysis of quantum noise generated on the implementation of quantum operations. The method of precision quantum measurements of logic quantum gates based on superconducting phase qubits is developed. The universal method of quantum state and process tomography is used to carry out a comprehensive analysis of the fidelity of the tomography of two-qubit SQiSW, CNOT, and CZ gates arising from the capacitive coupling between qubits. The method of optimization of quantum process tomography is proposed to provide a substantially higher degree of adequacy and fidelity compared to those attained by previously known methods. The examples of simulation of depolarizing quantum noise and amplitude- and phase-relaxation processes on the implementation of quantum operations in registers are considered.

DOI
10.1134/s1063739712060030

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A general approach to the provision of the quality and efficiency of quantum information technologies is proposed. The approach is based on the analysis of quantum noise generated on the implementation of quantum operations. The method of precision quantum measurements of logic quantum gates based on superconducting phase qubits is developed. The universal method of quantum state and process tomography is used to carry out a comprehensive analysis of the fidelity of the tomography of two-qubit SQiSW, CNOT, and CZ gates arising from the capacitive coupling between qubits. The method of optimization of quantum process tomography is proposed to provide a substantially higher degree of adequacy and fidelity compared to those attained by previously known methods. The examples of simulation of depolarizing quantum noise and amplitude- and phase-relaxation processes on the implementation of quantum operations in registers are considered.
We apply the method of compressed sensing (CS) quantum process tomography (QPT) to characterize quantum gates based on superconducting Xmon and phase qubits. Using experimental data for a two-qubit controlled-Z gate, we obtain an estimate for the process matrix $\ensuremath{\chi}$ with reasonably high fidelity compared to full QPT, but using a significantly reduced set of initial states and measurement configurations. We show that the CS method still works when the amount of used data is so small that the standard QPT would have an underdetermined system of equations. We also apply the CS method to the analysis of the three-qubit Toffoli gate with numerically added noise, and similarly show that the method works well for a substantially reduced set of data. For the CS calculations, we use two different bases in which the process matrix $\ensuremath{\chi}$ is approximately sparse, and show that the resulting estimates of the process matrices match each other with reasonably high fidelity. For both two-qubit and three-qubit gates, we characterize the quantum process by not only its process matrix and fidelity, but also by the corresponding standard deviation, defined via variation of the state fidelity for different initial states.
The Berkeley gate is a high-performance, two-qubit entangling operation with particular potential for quantum error correction and fault-tolerant protocols. However, harnessing this potential on current noisy intermediate-scale quantum (NISQ) processors, requires efficient compilation and robust performance under realistic noise conditions. In this work, we demonstrate a hardware-efficient implementation of the Berkeley gate on a superconducting quantum processor. Using quantum process tomography (QPT), we experimentally characterize its performance and benchmark it against a noiseless quantum simulator to evaluate its practical reliability in the NISQ era. Experimental measurements confirm the gate's correct logical action, producing the target partially entangled state with a subspace confinement probability of [Formula: see text] on real quantum hardware compared to 100% in quantum simulation. Results from QPT experiments show a simulated process fidelity of [Formula: see text], while the experimental process fidelity on hardware is [Formula: see text]. The observed discrepancy is analyzed in the context of device-specific noise sources, including qubit relaxation, dephasing, and state preparation and measurement (SPAM) errors. Our work provides a concrete fidelity benchmark for the Berkeley gate on superconducting hardware and quantify the impact of realistic noise on a non-trivial two-qubit operation, supporting its use in near-term algorithmic and error-correction applications.
We experimentally demonstrate quantum process tomography of controlled-Z and controlled-NOT gates using capacitively coupled superconducting phase qubits. These gates are realized by using the ∣2⟩|2⟩∣2⟩ state of the phase qubit. We obtain a process fidelity of 0.70 for the controlled phase and 0.56 for the controlled-NOT gate, with the loss of fidelity mostly due to single-qubit decoherence. The controlled-Z gate is also used to demonstrate a two-qubit Deutsch-Jozsa algorithm with a single function query.
Quantum process tomography of each single-qubit quantum gate used in the IBM quantum processors is performed to compute gate error in order to check viability of complex quantum operations in the superconductivity-based quantum computers introduced by IBM and to compare the quality of these gates with the corresponding gates implemented using other technologies. Gate fidelities for all the allowed gates for every allowed position (i.e., by placing the gates in different qubit lines) have been obtained and reported for IBM QX4 architecture. Gate fidelities are observed to be lower than the corresponding values obtained in the other technologies, like NMR. Further, gate fidelities for all the single-qubit gates are obtained for IBM QX2 architecture by placing the gates in the third qubit line (q[2]q[2]q[2]). It's observed that the IBM QX4 architecture yields better gate fidelity compared to IBM QX2 in all cases except the case of Y⁡\operatorname{Y}Y gate as far as the gate fidelity corresponding to the third qubit line is concerned. In general, the analysis performed here leads to a conclusion that a considerable technological improvement would be inevitable to achieve the desired scalability required for the realization of complex quantum operations.