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IEEE Transactions on Magnetics

New elements of the RSFQ logic family

Oleg A. Mukhanov, Stanislav V. Polonsky, Vasili K. Semenov

Published Mar 1, 1991• 35 citations
Publisher

Abstract

In this report, new rapid single-flux quantum (RSFQ) elements (OR-AND, NOR-AND, half adder, multiplexer, demultiplexer, and shift registers) are presented. Operation of these gates has been studied with the help of the personal superconductor circuit analyzer (PSCAN) within the standard RSJ model of Josephson junctions. Parameter margins and other performance limits of the new elements are thoroughly investigated.

DOI
10.1109/20.133710

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Several novel circuits of the rapid single-flux-quantum (RSFQ) family of Josephson-junction digital devices have been designed, fabricated using a 2.5- mu m 1000-A/cm/sup 2/ Nb trilayer technology, and tested at low frequencies. Numerical simulation and measurements have shown that these circuits have considerably wider parameter margins, due to application of several novel design methods. The authors have also carried out an experiment to measure the rate of errors in a simple RSFQ circuit including an inverter, confluence buffer, and Josephson transmission line. Near the middle of the parameter window at 4.2 K, the error probability was definitely lower than 3*10/sup -15/ per logic operation, despite experimentation with rudimentary shielding and filtering.>

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Abstract\nThis diploma work is about Rapid Single Flux Quantum (RSFQ) circuits. This\nsupercoducting digital circuitry has the most promising properties in terms of speed and\npower consumption. The active elements of the RSFQ circuits are Josephson junctions (JJ).\nFor their fabrication low temperature superconducting niobium films are used. Today the\ndesign and fabrication of RSFQ circuits are done in a standardized way with well-defined\ndesign rules. Nevertheless, to design complicated circuits with more than several hundred\njunctions a lot of practical problems must be solved.\nDifferent aspects of the RSFQ circuits design process were investigated in this work.\nIn the theoretical part we propose a new, more realistic model of the Josephson junction for\nphysical simulation (which is necessarily used for design of every RSFQ gate) in order to\nimprove its quality and precision. The new model for the JJ includes additional inductances,\nwhich must reflect a specific environment of the junction layout. The influence of parameter\ndeviations was investigated in the simulation. As sources of the deviation we chose the\nspread of c (the Stewart-McCumber parameter) and that of the inductances. Then the\noperational margins of the basic elements of the RSFQ logic SR flip-flop were determined\nand compared with the prediction of the previously used model. To prove the results of\nsimulations we designed a test structure of the SR flip-flop, with c=1 and c=2 for the wellestablished\nHYPRES technology (USA).\nAnother part of the work is practical measurements. A test chip, containing chains of 100\nJosephson junctions was designed and measured in order to estimate the spread of critical\ncurrents in real technology.

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Three digital logic families that can be made using nonhysteretic Josephson junctions (potentially the only kind of Josephson device realizable with superconductors having high transition temperatures) are analyzed. These logic families utilize magnetic flux-transfer, and are characterized by very low power dissipation. Rapid single flux quantum (RSFQ) and phase-mode logic are both based on pulse propagation. The quantum flux parametron (QFP) logic family is based on current latching. Simulations of RSFQ, Phase-Mode, and QFP logic families using high-T/sub c/ junction parameters are presented to demonstrate the compatibility of these logic families with the perovskite superconductors. The operation of these logic families is analyzed, and the advantages and disadvantages of each are discussed.

IEEE Transactions on Magnetics•Mar 1, 1991•4 citations
In this report, new rapid single-flux quantum (RSFQ) elements (OR-AND, NOR-AND, half adder, multiplexer, demultiplexer, and shift registers) are presented. Operation of these gates has been studied with the help of the personal superconductor circuit analyzer (PSCAN) within the standard RSJ model of Josephson junctions. Parameter margins and other performance limits of the new elements are thoroughly investigated.
A new family of dc-powered Josephson junction digital devices, the Rapid Single Flux Quantum (RSFQ) logic, is described. The devices use overdamped Josephson junctions and two-junction interferometers to store, pass and process the digital information presented in form of single flux quanta. We have carried out extensive numerical simulation of the dynamics of the RSFQ logic gates and of some more complex circuits including serial full adder and reversible shift register, within the standard microscopic-theory ("Werthamer") description of Josephson junctions. The minimum clock cycles of the basic RSFQ circuits turn out to be as small as 2.5 ps. The most promising ways to use the RSFQ logic circuits at the present stage of development of the Josephson junction digital technology are discussed.
We report on a voltage-state logic family based on shunted Josephson junctions and on the Rapid Single Flux Quantum (RSFQ) concept. Storing information in a voltage-state form makes this Multi-Flux-Quantum Logic (MFQL) easier to match to complementary metal-oxide semiconductor (CMOS) circuits. The switching of MFQL element between the voltage and zero-voltage states takes a minimum of two SFQ pulses, and the switching time of this logic is comparable to that of RSFQ logic. The key logic element is an inverter in the form of an asymmetric interferometer, and the underlying idea is to use a separate superconducting wire to supply a standard dc output voltage for the elements. The asymmetric interferometer, directly coupled to the other elements, is actually a Josephson junction based three-terminal device or transistor. Elements such as NOT, OR, NOR, XOR, XNOR, a toggle flip-flop, and an RS trigger have been simulated, and show margins better than /spl plusmn/24%. The performance of this logic with current circuit fabrication technologies is also discussed.
Several novel circuits of the rapid single-flux-quantum (RSFQ) family of Josephson-junction digital devices have been designed, fabricated using a 2.5- mu m 1000-A/cm/sup 2/ Nb trilayer technology, and tested at low frequencies. Numerical simulation and measurements have shown that these circuits have considerably wider parameter margins, due to application of several novel design methods. The authors have also carried out an experiment to measure the rate of errors in a simple RSFQ circuit including an inverter, confluence buffer, and Josephson transmission line. Near the middle of the parameter window at 4.2 K, the error probability was definitely lower than 3*10/sup -15/ per logic operation, despite experimentation with rudimentary shielding and filtering.>
Abstract\nThis diploma work is about Rapid Single Flux Quantum (RSFQ) circuits. This\nsupercoducting digital circuitry has the most promising properties in terms of speed and\npower consumption. The active elements of the RSFQ circuits are Josephson junctions (JJ).\nFor their fabrication low temperature superconducting niobium films are used. Today the\ndesign and fabrication of RSFQ circuits are done in a standardized way with well-defined\ndesign rules. Nevertheless, to design complicated circuits with more than several hundred\njunctions a lot of practical problems must be solved.\nDifferent aspects of the RSFQ circuits design process were investigated in this work.\nIn the theoretical part we propose a new, more realistic model of the Josephson junction for\nphysical simulation (which is necessarily used for design of every RSFQ gate) in order to\nimprove its quality and precision. The new model for the JJ includes additional inductances,\nwhich must reflect a specific environment of the junction layout. The influence of parameter\ndeviations was investigated in the simulation. As sources of the deviation we chose the\nspread of c (the Stewart-McCumber parameter) and that of the inductances. Then the\noperational margins of the basic elements of the RSFQ logic SR flip-flop were determined\nand compared with the prediction of the previously used model. To prove the results of\nsimulations we designed a test structure of the SR flip-flop, with c=1 and c=2 for the wellestablished\nHYPRES technology (USA).\nAnother part of the work is practical measurements. A test chip, containing chains of 100\nJosephson junctions was designed and measured in order to estimate the spread of critical\ncurrents in real technology.
Three digital logic families that can be made using nonhysteretic Josephson junctions (potentially the only kind of Josephson device realizable with superconductors having high transition temperatures) are analyzed. These logic families utilize magnetic flux-transfer, and are characterized by very low power dissipation. Rapid single flux quantum (RSFQ) and phase-mode logic are both based on pulse propagation. The quantum flux parametron (QFP) logic family is based on current latching. Simulations of RSFQ, Phase-Mode, and QFP logic families using high-T/sub c/ junction parameters are presented to demonstrate the compatibility of these logic families with the perovskite superconductors. The operation of these logic families is analyzed, and the advantages and disadvantages of each are discussed.