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IEICE Transactions on Communications

Lowering Error Floor of Irregular LDPC Codes by CRC and OSD Algorithm

Satoshi Gounai

Published Jan 1, 2006• 6 citations
Publisher

Abstract

Irregular Low-Density Parity-Check (LDPC) codes generally achieve better performance than regular LDPC codes at low E b /N 0 values. They have, however, higher error floors than regular LDPC codes. With respect to the construction of the irregular LDPC code, it can achieve the trade-off between the performance degradation of low E b /N 0 region and lowering error floor. It is known that a decoding algorithm can achieve very good performance if it combines the Ordered Statistic Decoding (OSD) algorithm and the Log Likelihood Ratio-Belief Propagation (LLR-BP) decoding algorithm. Unfortunately, all the codewords obtained by the OSD algorithm satisfy the parity check equation of the LDPC code. While we can not use the parity check equation of the LDPC code to stop the decoding process, the wrong codeword that satisfies the parity check equation raises the error floor. Once a codeword that satisfies the parity check equation is generated by the LLR-BP decoding algorithm, we regard that codeword as the final estimate and halt decoding; the OSD algorithm is not performed. In this paper, we propose a new encoding/decoding scheme to lower the error floor created by irregular LDPC codes. The proposed encoding scheme encodes information bits by Cyclic Redundancy Check (CRC) and LDPC code. The proposed decoding scheme, which consists of the LLR-BP decoding, CRC check, and OSD decoding, detects errors in the codewords obtained by the LLR-BP decoding algorithm and the OSD decoding algorithm using the parity check equations of LDPC codes and CRC. Computer simulations show that the proposed encoding/decoding scheme can lower the error floor of irregular LDPC codes.

DOI
10.1093/ietcom/e89-b.1.1

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Irregular Low-Density Parity-Check (LDPC) codes generally achieve better performance than regular LDPC codes at low E b /N 0 values. They have, however, higher error floors than regular LDPC codes. With respect to the construction of the irregular LDPC code, it can achieve the trade-off between the performance degradation of low E b /N 0 region and lowering error floor. It is known that a decoding algorithm can achieve very good performance if it combines the Ordered Statistic Decoding (OSD) algorithm and the Log Likelihood Ratio-Belief Propagation (LLR-BP) decoding algorithm. Unfortunately, all the codewords obtained by the OSD algorithm satisfy the parity check equation of the LDPC code. While we can not use the parity check equation of the LDPC code to stop the decoding process, the wrong codeword that satisfies the parity check equation raises the error floor. Once a codeword that satisfies the parity check equation is generated by the LLR-BP decoding algorithm, we regard that codeword as the final estimate and halt decoding; the OSD algorithm is not performed. In this paper, we propose a new encoding/decoding scheme to lower the error floor created by irregular LDPC codes. The proposed encoding scheme encodes information bits by Cyclic Redundancy Check (CRC) and LDPC code. The proposed decoding scheme, which consists of the LLR-BP decoding, CRC check, and OSD decoding, detects errors in the codewords obtained by the LLR-BP decoding algorithm and the OSD decoding algorithm using the parity check equations of LDPC codes and CRC. Computer simulations show that the proposed encoding/decoding scheme can lower the error floor of irregular LDPC codes.
In modern communication systems, the concatenation of a low-density parity-check (LDPC) code with a cyclic redundancy check (CRC) code is commonly used for error correction. In this paper, we propose a low-complexity two-stage scheme for decoding these codes using their concatenation structures. In the first stage, the traditional belief propagation (BP)-based iterative algorithm with a relative small maximum number of iterations is performed for decoding the LDPC code. If an LDPC codeword is obtained in this stage, the decoding process terminates. Otherwise, the second stage of the decoding process is performed, in which the guessing random additive noise decoding (GRAND) algorithm is applied to the CRC code. A list of information sequences satisfying the CRC check is obtained, each of which is then encoded to an LDPC codeword. The most likely codeword among them is the output of the decoding approach. The simulation results indicate that the proposed two-stage decoding approach can outperform the traditional BP-based iterative algorithm with a large maximum number of iterations. Moreover, the average complexity of the proposed approach is relatively low.
In this paper, a hybrid decoding scheme is proposed to lower the error floor of low-density parity-check codes. With the observation that some error bits' LLR values oscillate throughout iterative decoding procedure, a "feedback BP" (FBP) decoding algorithm is presented as second-stage decoding cell to reduce the phenomena of oscillations. The hybrid decoding scheme, which consists LLR-BP decoding algorithm and FBP decoding algorithm, detects errors in the codewords obtained by using the parity check equations of LDPC codes. Simulation results show that the new decoding scheme exhibits a lower error floor than that of belief propagation decoding algorithm in the moderate and high SNR region.
A low-density parity check (LDPC) code with the belief propagation (BP) or the log-likelihood ratio belief propagation (LLR-BP) can achieve good bit error rate (BER) performance approaching the Shannon limit. When a parity check matrix of the LDPC code has the cycle, the BP and LLR-BP decoding algorithms achieve approximate maximum a posterior probability (MAP) decoding. Although the decoding algorithms are approximate MAP decoding, LDPC codes can achieve very good BER. For the short and middle length LDPC codes, BER and block error rate (BLER) performances are affected by cycle largely. In each iteration, the magnitudes of a posterior LLRs of some bits oscillate owing to cycles. The oscillation is the dominant error factor in the high Eb/Noregion for short and middle length LDPC codes. In this paper, we extend the definition of oscillation to extrinsic LLR (ex-LLR) derived in the bit node process and propose the modified LLR-BP and the modified UMP-BP decoding algorithms. To reduce effects of oscillating ex-LLRs on decoding, for oscillating ex-LLRs, we add the previous ex-LLR to the current ex-LLR. From the computer simulation, we show that for short and middle length LDPC codes, with a simple modification, our proposed decoding algorithms can improve the conventional LLR-BP and UMP-BP decoding algorithms. In particular, we show that the modified UMP-BP decoding algorithm with low complexity can achieve better BER and BLER than the conventional LLR-BP decoding algorithm
Several decoding algorithms based on oscillation Log-likelihood ratio (LLR) for Lowdensity parity-check (LDPC) codes are investigated in this paper, based on which, an improved decoding algorithm which uses the accumulated LLR as the final bit decision merit is proposed. This approach improves the decoding performance with only a very small increase in storage and computation. Combined with normalized belief-propagation (BP), two algorithms are given, which are named as accumulate normalized BP (ACC-Nor-BP) and compare-add normalized BP (CA-Nor-BP). The storage requirements and computational complexity of ACC-Nor-BP is lower than that of CA-Nor-BP and CA-BP, but performance is close to the CA-Nor-BP and better than CA-BP; therefore ACC-Nor-BP algorithm is an effectively improved BP algorithm which has a good balance between performance and complexity.
A two-stage decoding algorithm to lower the error-floor for low-density parity-check (LDPC) codes is presented. An efficient stopping criterion is proposed to avoid unnecessary iterations in the first stage. If the stopping criterion is reached, the first stage decoding will be terminated and the second stage decoding will be started, where the unsuccessfully decoded words are re-decoded by manipulating the log-likelihood ratio (LLR) of two types of specifically selected variable nodes. Simulation results show that the proposed algorithm can effectively lower the error floor of LDPC codes while maintaining a low decoding complexity.