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Applied Physics Letters

Closed system fabrication of Josephson tunnel junctions

Gert K. G. Hohenwarter, J.E. Nordman

Published Mar 1, 1982• 7 citations
Publisher

Abstract

A technique for the fabrication of Josephson tunnel junctions without breaking vacuum and without the use of masks is presented. No chemical processing is done on either of the junction electrode surfaces. Hence, no chemical or reactive cleaning is required before the formation of the tunneling barrier. Nevertheless, standard photolithography and chemical or plasma etching can be employed for defining patterns. I-V characteristics of Nb-NbOx-Pb junctions fabricated by this method have not exhibited a ’’knee’’ at the onset of the quasiparticle current.

DOI
10.1063/1.93098

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TECHNOLOGIES FOR THE FABRICATION OF NANOSCALE SUPERCONDUCTING CIRCUITS

道生 渡部

Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.

Modern Physics Letters B•Apr 30, 2005•3 citations
A technique for the fabrication of Josephson tunnel junctions without breaking vacuum and without the use of masks is presented. No chemical processing is done on either of the junction electrode surfaces. Hence, no chemical or reactive cleaning is required before the formation of the tunneling barrier. Nevertheless, standard photolithography and chemical or plasma etching can be employed for defining patterns. I-V characteristics of Nb-NbOx-Pb junctions fabricated by this method have not exhibited a ’’knee’’ at the onset of the quasiparticle current.
A procedure is described for fabricating thin film Nb/Nb oxide/Pb-alloy Josephson tunnel junctions that satisfies the principal requirements for integrated circuit design and fabrication. A deposited Nb film, evaporated from an e-gun heated source, was patterned by chemical etching to form a base electrode. A junction was completed by plasma etching and plasma oxidizing the Nb junction area to form a tunnel barrier and by depositing a Pb alloy counterelectrode. Josephson tunnel junctions with Nb/Nb oxide/Pb-Au-In structures were prepared with low excess subgap currents in the current-voltage (I-V) curve and with reproducible and stable I-V characteristics. Variations in junction current density from run-run were ± 15%. Seven 3-junction interferomeeters out of a population of 50,000 were shorted (99.99% yield) for causes not immediately attributable to photoresist-related defects. No changes in Josephson current were detected after thermal cycling 17,000 interferometers 1,800 × between room temperature and 4.2°K, after storing them for 2 years at 5°C, or after annealing 5,000 interferometers for 4.5 hours at 70°C.
All hard Josephson tunnel junctions, whose base and counter electrodes are composed of double-layered niobium nitride (NbN) and niobium (Nb) films, have been successfully fabricated by isolating a junction sandwich formed on a whole silicon wafer with a reactive ion etching technique. The reactive ion etching technique has been used for patterning both base and counterelectrodes, and self-aligning definition of junction areas has been performed. The fabricated junctions show good quality single-particle tunneling characteristics and excellent uniformity in critical currents.
We have developed a new integration method for Josephson tunnel junctions based on high Tc superconducting compound materials such as NbN. In this method, a sputtered ZnO film has been employed as a resist mask which can be used in high substrate temperatures during the film deposition. It has been found that fine patterns of the refractory superconducting film can be obtained by this method and the patterning processes have no interference with other integration processes. We have applied this method to patterning base electrode of NbN and formed high quality NbN-oxide-Pb Josephson tunnel junctions by using an rf plasma oxidation. The fabricated junctions have been found to have a relatively large gap ( ∼ 4.0 mV ) and low current leak in the subgap region, and to be quite stable for thermal cyclings and storage. We have also fabricated quantum interference memory devices by integrating these junctions and the operation has been successfully demonstrated.
We have developed a novel process for fabricating all refractory Josephson tunnel junctions whose base and counter electrodes are composed of (Nb-NbN) double-layered films. In this process, tunnel junctions have been isolated using a reactive ion etching from a junction sandwich which had been formed on an entire silicon wafer, and also the reactive ion etching has been used for patterning electrodes and insulation layers in devices. Fabricated junctions have yielded good tunneling characteristics with excellent uniformity and reproducibility. The maximum critical current density was widely changed from 300 A/cm2to 8 kA/cm2. All refractory single flux quantum(SFQ) memory cells in a 32×32 arrangement have been integrated with a 2.5 μm minimum linewidth on a chip using this process, and an SFQ cell in the memory array has been successfully operated. The maximum deviation of critical currents in the memory array was measured to be ±6.5%.
Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.