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Nanotechnology

Superconducting nanotransistor based digital logic gates

Seung‐Beck Lee, G. D. Hutchinson, David A Williams, D. G. Hasko, Haroon Ahmed

Published Jan 16, 2003• 17 citations
Publisher

Abstract

We describe the fabrication and digital logic operation of superconducting nanotransistors. The nanotransistor is a superconducting weak-link device that has integrated hot-phonon injector heaters to control its switching critical current. The fabrication process utilizes a self-aligned method, where the heater acts as a mask for reactive ion etching to define the device pattern. This device is much simpler to fabricate than previously reported controllable superconducting transistors and the principle of operation makes it possible to use a single nanotransistor connected to a load resistor as a NOT logic gate, allowing lower power consumption and improved levels of integration.

DOI
10.1088/0957-4484/14/2/317

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We describe the fabrication and digital logic operation of superconducting nanotransistors. The nanotransistor is a superconducting weak-link device that has integrated hot-phonon injector heaters to control its switching critical current. The fabrication process utilizes a self-aligned method, where the heater acts as a mask for reactive ion etching to define the device pattern. This device is much simpler to fabricate than previously reported controllable superconducting transistors and the principle of operation makes it possible to use a single nanotransistor connected to a load resistor as a NOT logic gate, allowing lower power consumption and improved levels of integration.
We describe the fabrication and digital switching operation of a NOR logic gate that uses a single, dual-input superconducting nanotransistor. The nanotransistor is a weak-link device that has integrated hot-phonon injectors to control its critical current. The fabrication process utilizes a self-aligned method, where the two heaters act as a mask for reactive ion etching to define the device pattern. This device is much simpler to fabricate than previously reported superconducting transistors and the principle of operation makes it possible to use a single nanotransistor, with multiple input heaters, as a NOR logic gate, allowing lower power consumption and improved levels of integration.
We report on a novel method of controlling the supercurrent flow in a superconducting weaklink. We have fabricated a free-standing superconducting nanobridge with an integrated NiCr heater. This NiCr layer acts as a self-aligned mask for reactive ion etching and also as the normal metal heating element of the nanobridge. The heater is used to control the critical current of the superconducting weaklink part of the nanobridge; the free-standing nature of the nanobridge reduces the heater power required. We discuss the dependence of the current–voltage characteristics of the superconducting weaklink on heater current. This device has advantages over existing controllable weaklink devices.
Superconducting nanowire logic device is a new type of the cryogenic digital logic device. It has a series of characteristics such as fast speed, low power consumption, high gain, stable driving ability and simple fabrication process. It can be used to design superconducting digital circuits. In this paper, The ‘and/or’ basic logic gate structure is designed based on superconducting nanowires and a fabrication scheme of the device is developed based on micro-processing equipment. After building the system test circuit, the function of the ‘and’ gate and ‘or’ gate operating at 10 MHz frequency is verified.
High Resolution Image Download MS PowerPoint Slide Due to stringent thermal budgets in cryogenic technologies such as superconducting quantum computers and sensors, electronic building blocks that simultaneously offer low energy consumption, fast switching, low error rates, a small footprint, and simple fabrication are pivotal for large-scale devices. Here, we demonstrate a superconducting switch with attojoule switching energy, high speed (pico-second rise/fall times), and high integration density (on the order of 10 –2 μm 2 per switch). It consists of a superconducting nanochannel and a metal heater separated by an insulating silica layer. We experimentally demonstrate digital gate operations utilizing these nanostructures, such as NOT, NAND, NOR, AND, and OR gates, with a few femtojoules of energy consumption and ultralow bit error rates <10 –8 . In addition, we build energy-efficient volatile memory elements with nanosecond operation speeds and a retention time over 10 5 s. These superconducting switches open new possibilities for increasing the size and complexity of modern cryogenic technologies.
The growing demand for ultra low power computing and the emergence of quantum technologies have intensified interest in cryogenic electronics, particularly superconducting devices. Despite their promise, current controlled superconducting components face fundamental challenges in cascadability, limiting their effectiveness in complex logic architectures. To overcome this, recent efforts have focused on developing gate tunable superconducting devices, such as Josephson junction field effect transistors (JJFETs). However, achieving robust control and sufficient supercurrent gain, both critical for transistor-like performance in logic circuits remains a key challenge. A recent advancement in JJFET design, based on InAs and GaSb heterostructures, demonstrates enhanced gain and favorable device characteristics suitable for circuit integration. Building on this innovation, we propose and analyze fundamental voltage controlled logic topologies using the quantum enhanced JJFET. We develop a Verilog A based circuit compatible compact model of the quantum enhanced JJFET which accurately captures the experimentally observed device characteristics. To ensure cascadability, our logic circuits incorporate the multilayered Heater Nanocryotron (nTron), a superconducting nanowire-based thermal switch. Through simulation based analysis, we demonstrate the successful implementation of fundamental logic gates, including NOT, NAND, and NOR. Furthermore, we design a 3 input majority gate, which plays a pivotal role in quantum and reversible computing due to its universality. Finally, to demonstrate the cascadability of our proposed logic topology, we demonstrate the operation of a 2 input XOR gate based on our designed JJFET based NOT, NAND, and NOR gate.