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Superconductor Science and Technology

Rapid single-flux-quantum circuits for low noise mK operation

Samuel Intiso, Jukka P Pekola, Alexander M. Savin, Ygor Devyatov, Anna Kidiyarova-Shevchenko

Published Mar 16, 2006• 16 citations
Publisher

Abstract

Rapid single-flux-quantum (RSFQ) technology has been proposed as control electronics for superconducting quantum bits because of the material and working temperature compatibility. In this work, we consider practical aspects of RSFQ circuit design for low noise low power operation. At the working temperature of 20 mK and operational frequency of 2 GHz, dissipated power per junction is reduced to 25 pW by using 6 µA critical current junctions available at the Hypres and VTT low J c fabrication process. To limit phonon temperature to 30 mK, a maximum of 40 junctions can be placed on a 5 mm × 5 mm chip. Electron temperature in resistive shunts of Josephson junctions is minimized by use of cooling fins, giving minimum electron temperatures of about 150 mK for the Hypres process and 70 mK for the VTT process.

DOI
10.1088/0953-2048/19/5/s36

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Rapid single-flux-quantum (RSFQ) technology has been proposed as control electronics for superconducting quantum bits because of the material and working temperature compatibility. In this work, we consider practical aspects of RSFQ circuit design for low noise low power operation. At the working temperature of 20 mK and operational frequency of 2 GHz, dissipated power per junction is reduced to 25 pW by using 6 µA critical current junctions available at the Hypres and VTT low J c fabrication process. To limit phonon temperature to 30 mK, a maximum of 40 junctions can be placed on a 5 mm × 5 mm chip. Electron temperature in resistive shunts of Josephson junctions is minimized by use of cooling fins, giving minimum electron temperatures of about 150 mK for the Hypres process and 70 mK for the VTT process.
We report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm2^{2}2to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.
Superconducting digital technology based on Rapid Single Flux Quantum logic (RSFQ) is a digital technology characterized by high speed, low power consumption and low operational temperatures. RSFQ is attractive for many applications and in particular for high frequency Digital Signal Processing (DSP) and for digital control of mK devices like superconducting qubits. Due to the 30 GHz clock speed, RSFQ DSP could be used to implement a Successive Interference Canceller for multi-user detection in a 3G wireless systems. The being developed DSP consists of a digital core, an RSFQ Multiply Accumulate unit (MAC), RSFQ fast cache memory and external semiconductor memory.The first part of this thesis is focusing on architecture and implementation of the hierarchical CMOS-RSFQ hybrid memory for the RSFQ DSP. The architecture ofthe RSFQ cache is optimized in order to reach the highest speed and reliable data communication with CMOS memory. Aspects of block synchronization betweenthe RSFQ cache and the RSFQ digital core are discussed and solved using a new developed RSFQ gate, C3. For design of different components of the DSP, a designapproach based on validated VHDL models is proposed and experimentally verified.The second part of this thesis is focusing on the design oflow-dissipative RSFQ circuits for interface to the superconducting qubits. Power dissipation ofRSFQ circuits is minimized. A low-temperature thermal model of resistively shunted Josephsonjunctions is developed and applied to optimize the shape of the shunt resistors in order to reduce their electron temperature. Depending on the available fabricationprocess the lowest noise temperature of RSFQ circuit can be in the range from 90 mK to 180 mK.
Abstract Superconductor logic families can operate with small power dissipation and are thus suitable as building blocks for various computing systems. In some applications, superconductor logic circuits should be designed using Josephson junctions with low I c values ( I c : critical current). For instance, lowering I c values enables qubit interface circuits to operate with very small power dissipation at ~10 mK and stochastic electronics to easily induce stochastic operations. In this study, we develop the AIST 1 kA cm −2 Nb planarized process (1KP) with a minimum critical current of 10 µA, dedicated to the design of qubit interface circuits and stochastic electronics. We also develop rapid single-flux-quantum (RSFQ) and adiabatic quantum-flux-parametron (AQFP) cell libraries using the 1KP. The power dissipation of RSFQ logic using the 1KP can be reduced to 3.2% of that for conventional RSFQ logic by reducing both I c values and a bias voltage. Furthermore, the amount of supply currents for AQFP circuits using the 1KP can be reduced to ~40% of that for conventional AQFP circuits due to a large mutual inductance between AQFP gates and excitation lines, which results from a reduction in I c and an increase in inductances. We demonstrate RSFQ and AQFP circuits fabricated by the 1KP at 4.2 K. These results indicate that RSFQ and AQFP circuits using the 1KP have the potential to be used for the design of qubit interface circuits and stochastic electronics.
Rapid single flux quantum (RSFQ) electronics is based on the Josephson junction as an active switching element. In standard RSFQ circuits its switching energy is much lower than the static power consumption caused by the resistive current distribution network. Due to this thermal heating of the chip, the maximum number of junctions on a single chip is limited to about 1 million. The frequency-dependent contribution to power dissipation from junction switchings is only about 2 percent of the static one. This fact limits the direct construction of VLSI systems for high-performance computing as well as small-scale circuit applications in the vicinity of ultra-sensitive detectors or even quantum circuits. We present an assessment of different approaches for reducing the static power consumption by investigating the potential of inductive bias distribution networks as well as reduced critical currents. We analyse the operation stability of simple digital circuits with 5 times smaller critical currents at 4.2 K. The combination of the reduced critical currents and inductive biasing can provide digital superconductive circuits with significantly reduced static power consumption.
We report successful operations of low-energy consumption rapid single-flux-quantum (RSFQ) circuits applying lowered driving voltages, called LV-RSFQ, using different fabrication processes. In the LV-RSFQ, we feed bias currents to Josephson junctions from lowered constant voltages (less than 1 mV) through small resistors without extra inductors. Both static and dynamic energy consumption are reduced because of suppression of amplitudes of SFQ pulses, in exchange for slower switching speed. We show that the switching speed in LV-RSFQ circuits is improved by increasing critical current density of Josephson junctions. We demonstrated high-speed operations of LV-RSFQ shift registers in a range of 5-40 GHz and 15-90 GHz using the 2.5-kA/cm2and 10-kA/cm2fabrication technologies, respectively. Comparison of the experimental results of the LV-RSFQ circuits fabricated using two different technologies derives the optimum bias voltage in terms of energy-delay product ranged from 0.1 to 1.0ICRS, whereICRSis the product of Josephson critical current and shunt resistance.
We have demonstrated rapid-single-flux-quantum (RSFQ) circuits with reduced power consumptions by lowering bias voltages and critical currents. The power consumption including a power consumption of a bias resistor is measured to be around 1 nW/JJ in 8-bit shift registers, while the operating frequency ranges from 7.5 GHz to 20 GHz. we lower bias voltages applied to RSFQ circuits. The values of bias resistances are proportional to bias voltages. At lowered bias voltages, the power consumption of the bias resistor is reduced. When a voltage begins to be generated at a Josephson junction, the net current provided to the junction and to the shunt resistor is decreased. As a result, the magnitude of the voltage is suppressed, and the power consumption of the shunt resistor is reduced. The power energy-delay product is about 70 times smaller and the the energy-delay product is more than 13 times smaller than that of the conventional RSFQ circuits. Low poewer SFQ circuits are superior in terms of energy-delay product to semiconductor circuits though the power consumption of SFQ cicuits contains the refrigerating machine.