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International Conference on Computer and Communication Technologies in Agriculture Engineering

Construction of reversible network-based the anti-sequence of natural number pair

Yueqin Hang, Zhijin Guan, Lei Yang

Published Jun 1, 2010• 0 citations
Publisher

Abstract

Reversible computing is an emerging area of research and reversible logic synthesis is its important aspect. This paper proposed the reversible logic gate network cascade method-based the anti-sequence of natural number pair, which can generate single reversible network or the batching continuous sequence numbers reversible network. Compared with examples of the benchmark, the number of control-bit and the number of the reversible logic gates have been improved to some degree.

DOI
10.1109/cctae.2010.5544174

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Reversible computing is an emerging area of research and reversible logic synthesis is its important aspect. This paper proposed the reversible logic gate network cascade method-based the anti-sequence of natural number pair, which can generate single reversible network or the batching continuous sequence numbers reversible network. Compared with examples of the benchmark, the number of control-bit and the number of the reversible logic gates have been improved to some degree.
Reversible calculating is an emerging area of research and reversible logic synthesis is its important aspect. This paper proposed the reversible logic gate network cascade method-based the variable system numbers, which can generate single reversible network or the batching continuous sequence numbers reversible network. Via the corresponding relationship between the variable system numbers and reversible network output vectors, we can locate quickly the corresponding sequence numbers of the reversible network output vectors and judge preciously whether the output vectors have been appeared meanwhile reducing the times of search and search space. Compared with examples of the benchmark, the number of control-bit and the number of the reversible logic gates have been improved to some degree.
Reversible computing is an emerging area of research.The reversible logic gate cascade is the important composition parts of the reversible logic synthesis.This paper proposed the reversible logic gate network cascade method-based the reversible logic gate coding and the variable system numbers,which can generate single reversible network or the batching continuous sequence numbers reversible network.Via the corresponding relationship between the variable system numbers and reversible network output vectors,we can locate quickly the corresponding sequence numbers of the reversible network output vectors and judge preciously whether the output vectors have been appeared meanwhile reducing the times of search and search space.Compared with examples of the benchmark,the number of control-bits and the number of the reversible logic gates has been improved to some degree.
Reversible computing is an emerging area of research and reversible logic synthesis is its important aspect. This paper provides reversible network cascade method based on reversible logic gate coding method. According to the number of vertical lines and control bits, which from small to large, the method constructs automatically the different output vectors corresponding network meanwhile the algorithm can generate all the reversible network. Compared with the three variables reversible function test in benchmark, its control gates amounts are much less and the cost is much lower.
This paper proposed the reversible logic gate network cascade method-based the reversible logic gate the Dynamic binary spanning tree, which can generate single reversible network or the batching continuous sequence numbers reversible network. The search time and search space are reduced by the corresponding relationship between the variable system numbers and reversible network output vectors, we can locate quickly the corresponding sequence numbers of the reversible network output vectors and judge previously whether the output vectors have been appeared. Compared with examples of the benchmark, the number of control-bit and the number of the reversible logic gates have been improved to some degree.
A reversible logic function maps each of the 2m input patterns to a unique output pattern. The network cascade structure problem is to realize a reversible function by a cascade of primitive reversible gates. We present a method that synthesizes a network with family of Toffoli gates. The cascade algorithm finds cascade of Toffoli gates with no backtracking and minimal look-ahead, and apply transformations that reduce the number of gates in the network. We have synthesized all three input and output reversible functions and compare our results to the other optimal results. We also present the results of applying our synthesis method to obtain networks for number of benchmark function.
The research in reversible logic has been attracted in recent years. It has applications in quantum computing, low-power CMOS design and nanotechnology. Many methods on how to cascade a reversible network have been proposed. And all these networks are composed of Toffoli/Fredkin gates. In this paper, we present a method that synthesizes a network with family of Positive/Negative Control (PNC) gates. Through introducing some examples for 3×3 reversible functions, and comparing with the network which is composed of Toffoli gates, the results show that introducing the PNC gates can produce an improvement for the number of gates in the reversible network, and have an advantage in reducing the cost of network.