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應用於低密度對稱檢查碼(LDPC)解碼器之運算方法及其電路

陸志豪, 廖彥欽, 李鎮宜, 張錫嘉, 許雅三

Published Aug 1, 2011• 0 citations
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???????????? ???????????? ????????? LDPC ?????? ?????? ??????

?????????

??? ??????????????? ???????????? ???????????? ????????? LDPC ?????? ?????? ????????? ????????????. ?????? ?????? ?????? ?????? ???????????? ???????????? ???????????? ????????? ?????? ???????????? ???????????? ????????? ?????? ?????? LDPC ?????? ????????? ????????????. ????????? LDPC ????????? ???????????? Tanner ???????????? ????????? ?????? ????????? ????????? LDPC ???????????? ???????????? ????????? ????????? ?????? ?????? ?????? ????????? ????????????. ?????? ?????????????????? ???????????? ???????????? ????????? LDPC ?????? ?????? ????????? ????????? ???????????? ??? ?????? ?????? ?????? ?????? ????????? ???????????????. ???????????? LDPC ????????? ????????? ???????????? ???-????????? ??? ???-?????? ??? ?????? ??? ?????? ?????? ??????????????? ????????? ????????? ?????? ?????? ??? ?????? ????????? ????????? ????????? ??? ?????????.

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Parallel decoding of LDPC convolutional codes using OpenMP and GPU

Chi Ho Chan, Francis C. M. Lau

Recently, there have been different applications, namely 10GBase-T Ethernet, video broadcasting and satellite communication, utilizing low-density parity-check (LDPC) codes as the forward-error-correction codes. The main reason is that the error performance of LDPC codes can be very close to the Shannon limit. LDPC codes can be further categorized into LDPC block codes (LDPC-BCs) and LDPC convolutional codes (LDPC-CCs). It has also been discovered that LDPC-CCs usually outperform LDPC-BCs. Simulation of LDPC-BCs and LDPC-CCs can take a lot of time because the decoding algorithms are relatively complex. Fortunately, the decoding steps can be performed in parallel. In this paper, we create three different platforms for simulating the error performance of LDPC-CCs. The first two platforms are run on a Central Processing Unit (CPU) while the third one involves the use of a Graphics Processing Unit (GPU). We show that using GPU can improve the simulation speed substantially.

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??? ??????????????? ???????????? ???????????? ????????? LDPC ?????? ?????? ????????? ????????????. ?????? ?????? ?????? ?????? ???????????? ???????????? ???????????? ????????? ?????? ???????????? ???????????? ????????? ?????? ?????? LDPC ?????? ????????? ????????????. ????????? LDPC ????????? ???????????? Tanner ???????????? ????????? ?????? ????????? ????????? LDPC ???????????? ???????????? ????????? ????????? ?????? ?????? ?????? ????????? ????????????. ?????? ?????????????????? ???????????? ???????????? ????????? LDPC ?????? ?????? ????????? ????????? ???????????? ??? ?????? ?????? ?????? ?????? ????????? ???????????????. ???????????? LDPC ????????? ????????? ???????????? ???-????????? ??? ???-?????? ??? ?????? ??? ?????? ?????? ??????????????? ????????? ????????? ?????? ?????? ??? ?????? ????????? ????????? ????????? ??? ?????????.
Recently, there have been different applications, namely 10GBase-T Ethernet, video broadcasting and satellite communication, utilizing low-density parity-check (LDPC) codes as the forward-error-correction codes. The main reason is that the error performance of LDPC codes can be very close to the Shannon limit. LDPC codes can be further categorized into LDPC block codes (LDPC-BCs) and LDPC convolutional codes (LDPC-CCs). It has also been discovered that LDPC-CCs usually outperform LDPC-BCs. Simulation of LDPC-BCs and LDPC-CCs can take a lot of time because the decoding algorithms are relatively complex. Fortunately, the decoding steps can be performed in parallel. In this paper, we create three different platforms for simulating the error performance of LDPC-CCs. The first two platforms are run on a Central Processing Unit (CPU) while the third one involves the use of a Graphics Processing Unit (GPU). We show that using GPU can improve the simulation speed substantially.