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IEEE International Symposium on Information Theory (ISIT)

Decoding of low-density parity check codes over finite-state binary Markov channels

Javier Garcia‐Frias

Published Nov 13, 2002• 19 citations
Publisher

Abstract

We propose a modified algorithm for decoding of low-density parity check codes over finite-state binary Markov channels. The hidden Markov model representing the channel is incorporated into the bipartite graph of the low-density parity check code, and the message passing algorithm is modified accordingly. This approach clearly outperforms systems in which the channel statistics are not exploited in the decoding, allowing reliable communication at rates which are above the capacity of a memoryless channel with the same stationary bit error probability as the Markov channel. Moreover, we introduce a joint estimation/decoding method that allows the estimation of the parameters of the channel when they are not known a priori.

DOI
10.1109/isit.2001.935935

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We propose a modified algorithm for decoding of low-density parity check codes over finite-state binary Markov channels. The hidden Markov model representing the channel is incorporated into the bipartite graph of the low-density parity check code, and the message passing algorithm is modified accordingly. This approach clearly outperforms systems in which the channel statistics are not exploited in the decoding, allowing reliable communication at rates which are above the capacity of a memoryless channel with the same stationary bit error probability as the Markov channel. Moreover, we introduce a joint estimation/decoding method that allows the estimation of the parameters of the channel when they are not known a priori.
We propose a modified algorithm for the decoding of linear codes with low-density generator matrix (LDGM) codes (a class of LDPC codes) over indoor and finite-state binary Markov channels. In order to avoid error floors, a concatenation of two LDGM codes is utilized. The hidden Markov model representing the channel is incorporated into the graph corresponding to the LDGM codes, and the message passing algorithm is modified accordingly. The proposed scheme clearly outperforms systems in which the channel statistics are not exploited in the decoding process, allowing reliable communication at rates which are above the capacity of a memoryless channel with the same stationary bit error probability as the Markov channel. Moreover, the proposed method can be successfully applied for real wireless channels that can be modeled with hidden Markov models, such as indoor channels.
Here we have proposed two decoding strategies of low-density parity-check (LDPC) codes over Markov noise channels with bit flipping noise. The sum-product algorithm used for decoding LDPC codes over memoryless channels is extended to include channel estimation and how much gain we obtain by doing so is simulated and verified. LDPC codes have been studied for years over memoryless channels and are known to have excellent performance. However, these codes over channels with memory is the topic of current research. Here, channels with memory are characterized by Markov modeling which is a useful busty channel model. With sufficient no. of states, they are able to model sufficient noise characteristics. We have gone for a two-state system as it shows a good compromise between complexity and performance.
An improved decoding algorithm for low-density parity-check code(LDPC) on finite-state Markov channels was presented and the corresponding factor graph representation was given.It consists of two parts: standard sum-product algorithm(SPA) for LDPC and forward-backward(FB) algorithm for Markov channel.After each iteration for SPA,FB re-estimated the channel likelihood ratio for the next iteration of SPA based on soft decisions for noise bits from SPA.Considering more cycles in the factor graph with the introduction of the Markov channel node,the probabilistic schedule was used to update the message during the iterations for decoding.Simulation results show that the algorithm not only performs much better than the standard sum-product algorithm,but also outperforms the algorithm based on hard decisions for noise bits.
In this paper, we propose a binary message-passing algorithm for decoding low-density parity-check (LDPC) codes. The algorithm substantially improves the performance of purely hard-decision iterative algorithms with a small increase in the memory requirements and the computational complexity. We associate a reliability value to each nonzero element of the code's parity-check matrix, and differentially modify this value in each iteration based on the sum of the extrinsic binary messages from the check nodes. For the tested random and finite-geometry LDPC codes, the proposed algorithm can achieve performance as close as 1.3 dB and 0.7 dB to that of belief propagation (BP) at the error rates of interest, respectively. This is while, unlike BP, the algorithm does not require the estimation of channel signal to noise ratio. Low memory and computational requirements and binary message-passing make the proposed algorithm attractive for high-speed low-power applications.
In this paper, we propose a binary message-passing algorithm for decoding low-density parity-check (LDPC) codes. The algorithm substantially improves the performance of purely hard-decision iterative algorithms with a small increase in the memory requirements and the computational complexity. We associate a reliability value to each nonzero element of the code's parity-check matrix, and differentially modify this value in each iteration based on the sum of the extrinsic binary messages from the check nodes. For the tested random and finitegeometry LDPC codes, the proposed algorithm can perform as close as about 1 dB and 0.5 dB to belief propagation (BP) at the error rates of interest, respectively. This is while, unlike BP, the algorithm does not require the estimation of channel signal to noise ratio. Low memory and computational requirements and binary message-passing make the proposed algorithm attractive for high-speed low-power applications.