This report results from a contract tasking University of Erlangen-Nuremberg as follows: The contractor will investigate the use of Rapid Single Flux Quantum (RSFQ) logic circuitry to read qubits in 3-micron wide Josephson transmission line (JTL). He will construct semiconductor chips as necessary to test his theories on RSFQ circuitry and document his findings in a final report.
This report results from a contract tasking University of Erlangen-Nuremberg as follows: The contractor will investigate the use of Rapid Single Flux Quantum (RSFQ) logic circuitry to read qubits in 3-micron wide Josephson transmission line (JTL). He will construct semiconductor chips as necessary to test his theories on RSFQ circuitry and document his findings in a final report.
A detailed design is given for a flux qubit readout using ballistic fluxons. In this scheme, fluxons propagate through an underdamped Josephson transmission line (JTL) coupled to the qubit, whose state affects the fluxon propagation time. For strong qubit–JTL coupling, and far from the symmetry point, a qubit can be measured with fidelity greater than 99% and measurement time of 4 ns. The readout circuit requires additional rapid single flux quantum (RSFQ) interface circuitry to launch and receive the delayed flux solitons. The parameters of this driver and receiver have been optimized to produce low fluxon speed at launch and impedance matching at the receiver. The delayed solitons are compared to a reference line using a detector with time resolution of better than 16 ps. Both the JTL and RSFQ interface were designed for the Nb 30 A cm −2 process developed at VTT, Finland, with postdeposition of the Al qubit at IPHT, Germany.
ENGLISH ABSTRACT: Rapid Single Flux Quantum (RSFQ) cells are key in the design of complex and applicable RSFQ electronic circuits. These cells are low-level circuit elements that are used repeatedly to build larger, applicable RSFQ circuitry. Making these cells simple to layout and manufacture, but reliable for extensive use demands a careful development process for RSFQ cells. Cell functionality is verified through simulations, thereafter the cell is laid out in special software packages. Inductance of on-chip superconductor structures is extracted through careful modelling with numerical field solver software. A cell library has been developed by incorporating existing or published cells after further analysis and optimization, as well as developing new cells. Cells that have been adapted into the library include the Josephson transmission line (JTL), Splitter, Merger, D-Flip Flop (DFF), T-Flip Flop (TFF), NOT, AND, OR and XOR, DC-SFQ and SFQ-DC and PTL Driver and Receivers. New cells include NOR, NAND and XNOR. The cells were designed for the IPHT’s RSFQ1D 1kA/cmª and Hypres’ 4.5kA/cmª processes. The cells in the library have good bias current operating margins obtained through simulations (> ±26%). All cells have all the parameters listed in the thesis including extracted inductance values. In order to have a complete and verified RSFQ cell library, cells have been sent for fabrication at IPHT and Hypres facilities. These cells can now be tested on-chip, in the laboratory, to establish functionality and practical bias current margins. All test signal patterns and bias currents required for testing are defined to allow co-workers or collaborators to test the cells.
We describe the readout process of the state of a Josephson flux qubit via solitons in Josephson transmission lines (JTLs) as they are in use in the standard rapid single flux quantum technology. We consider the situation where the information about the state of the qubit is stored in the time delay of the soliton. We analyze dissipative underdamped JTLs, take into account their jitter, and provide estimates of the measuring time and efficiency of the measurement for relevant experimental parameters.
As superconducting quantum processors increase in size and complexity, the scalability of standard techniques for qubit control and readout becomes a limiting factor. Replacing room temperature analog components with cryogenic digital components could allow for the realization of systems well beyond the current state-of-the-art qubit arrays with tens of qubits. The standard technique for performing a qubit measurement with heterodyne readout uses a quantum-limited cryogenic amplifier chain and requires bulky microwave components inside the refrigerator with multiple control lines and pump signals. Additionally, the result is only accessible in software at room temperature. An alternative method for measuring qubits involves mapping the qubit state onto the photon occupation in a microwave cavity, followed by subsequent photon detection using a Josephson photomultiplier (JPM). The JPM measures the qubit and stores the result in a classical circulating current. To make use of this result, we can leverage existing single flux quantum (SFQ) circuitry. An underdamped Josephson transmission line (JTL) can be coupled to the JPM and fluxons traveling along the JTL are accelerated or delayed, depending on the circulating current state of the JPM. This fluxon delay can then be converted to an SFQ logic signal resulting in a digital qubit readout with a proximal microfabricated device, paving the way for cryogenic digital feedback necessary for error-correcting codes.
Rapid Single Flux Quantum (RSFQ) Josephson-junction technology is capable of processing digital data at sub-terahertz frequencies while dissipating almost negligible power. At the present time one can routinely simulate, optimize, design, manufacture, and test an elementary RSFQ logic/memory cell consisting of dozens of Josephson junctions. Furthermore, a number of relatively complex (few hundred to few thousand Josephson junctions) digital circuits were designed and successfully tested. Moreover we know how to implement several RSFQ systems (including analog-to-digital and digital-to-analog converters, digital SQUIDs for supersensitive magnetometry, and digital autocorrelator for radioastronomy) which would far outperform their currently available and even prospective semiconductor counterparts. In order to implement more complex RSFQ systems, including high-performance digital signal processors and general purpose computers there are a number of technical problems to solve. The issues include making full use of on-chip sub-terahertz processing in conditions when inter-chip data/clock exchange speed is bound by bandwidth of the order of a few Gbps/pin. I present the current know-how of the field, and formulate the questions that need to be solved before the RSFQ technology becomes a major workhorse of high-performance computation.
We present the results of an analytical study and numerical simulation of the dynamics of a superconducting three-Josephson-junction (3JJ) flux qubit magnetically coupled with rapid single-flux quantum (RSFQ) logic circuit, which demonstrate the fundamental possibility of implementing the simplest logic operations at picosecond times, as well as rapid non-destructive readout. It is shown that when solving optimization problems, the qubit dynamics can be conveniently interpreted as a precession of the magnetic moment vector around the direction of the magnetic field. In this case, the role of magnetic field components is played by combinations of the Hamiltonian matrix elements, and the role of the magnetic moment is played by the Bloch vector. Features of the 3JJ qubit model are discussed during the analysis of how the qubit is affected by exposure to a short control pulse, as are the similarities between the Bloch and Landau-Lifshitz-Gilbert equations. An analysis of solutions to the Bloch equations made it possible to develop recommendations for the use of readout RSFQ circuits in implementing an optimal interface between the classical and quantum parts of the computer system, as well as to justify the use of single-quantum logic in order to control superconducting quantum circuits on a chip.