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International Conference on Communications

Low error-floor majority-logic decoding based algorithm for non-binary LDPC codes

Liyuan Song, Mu Zhang, Qin Huang, Zulin Wang

Published Jun 1, 2015• 2 citations
Publisher

Abstract

The traditional majority-logic decoding (MLgD) based algorithms suffer error-floors for decoding non-binary LDPC codes with small column weights. This paper presents a bit-reliability based MLgD (BRB-MLgD) algorithm with low error-floors for non-binary LDPC codes. The proposed algorithm is carried out based on the binary representations of non-binary symbols. The reliability update along each edge of the Tanner graph of a non-binary LDPC code is in terms of bits rather than symbols. Thus, its computational complexity and memory consumption are less than those of the existing MLgD based algorithms. Simulation results indicate that the proposed algorithm can significantly reduce error-floors with small performance degradation in the waterfall region.

DOI
10.1109/icc.2015.7248961

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The traditional majority-logic decoding (MLgD) based algorithms suffer error-floors for decoding non-binary LDPC codes with small column weights. This paper presents a bit-reliability based MLgD (BRB-MLgD) algorithm with low error-floors for non-binary LDPC codes. The proposed algorithm is carried out based on the binary representations of non-binary symbols. The reliability update along each edge of the Tanner graph of a non-binary LDPC code is in terms of bits rather than symbols. Thus, its computational complexity and memory consumption are less than those of the existing MLgD based algorithms. Simulation results indicate that the proposed algorithm can significantly reduce error-floors with small performance degradation in the waterfall region.
This paper presents bit-reliability based majority-logic decoding (MLgD) algorithms for non-binary LDPC codes. The proposed algorithms pass only one Galois field element and its reliability along each edge of the Tanner graph of a non-binary LDPC code. Since their reliability updates are in terms of bits rather than symbols, they are more efficient than traditional MLgD based decoding algorithms. By weighting the soft reliability of the extrinsic information-sums based on their hard reliability, the proposed algorithms can achieve good error performance for non-binary LDPC codes with various column weights. Moreover, their computational complexity and memory consumption are remarkably reduced compared with existing MLgD based decoding algorithms. As a result, they provide effective tradeoffs between error performance and complexity for decoding of non-binary LDPC codes.
Majority-logic algorithms are devised for decoding non-binary LDPC codes in order to reduce computational complexity. However, compared with conventional belief propagation algorithms, majority-logic algorithms suffer from severe bit error performance degradation. This paper presents a low-complexity reliability-based algorithm aiming at improving error correcting ability of majority-logic algorithms. Reliability measures for check nodes are novelly introduced to realize mutual update between variable message and check message, and hence more efficient reliability propagation can be achieved, similar to belief-propagation algorithm. Simulation results on NB-LDPC codes with different characteristics demonstrate that our algorithm can reduce the bit error ratio by more than one order of magnitude and the coding gain enhancement over ISRB-MLGD can reach 0.2-2.0dB, compared with both the ISRB-MLGD and IISRB-MLGD algorithms. Moreover, simulations on typical LDPC codes show that the computational complexity of the proposed algorithm is closely equivalent to ISRB-MLGD algorithm, and is less than 10% of Min-max algorithm. As a result, the proposed algorithm achieves a more efficient trade-off between decoding computational complexity and error performance.
This paper presents a majority-logic decoding (MLgD) algorithm for non-binary LDPC codes based on a novel expansion of the Tanner graph. The expansion introduced converts the Q-ary graph into a binary one, which makes the new MLgD algorithm more attractive for hardware implementations. Proposed algorithm performs significantly better than the existing MLgD algorithms in the waterfall region, and it shows a much lower error-floor as well. Algorithm only requires integer additions, comparisons, finite field operations and some binary operations. Thus, it offers an effective trade-off between performance and complexity in decoding non-binary LDPC codes.
This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability-based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB- and ISRB-MLGD with limited complexity increase.
The bit reliability based (BRB) and weighted bit reliability based (wBRB) algorithms are non-binary low-density parity-check (LDPC) code decoding algorithms with an excellent tradeoff between computational complexity and performance. However, the performance of these algorithms needs further improvement. We apply deep learning to these algorithms. Weights are assigned to each edge of the Tanner graphs of the non-binary LDPC codes in the proposed algorithms. We demonstrate the effectiveness of applying deep learning to the BRB and wBRB algorithms in terms of implementation and performance. The proposed algorithms achieve an approximately 0.3 dB higher bit error rate performance than the original algorithms in the high SNR region. The increase in computational complexity and memory consumption does not significantly change the implementation of the algorithms.
Message-passing decoders typically perform well for nonbinary low-density parity-check (NB-LDPC) codes with large computational complexity. As another type of simplified decoders, symbol-reliability-based decoders further reduce the computational complexity. However, the previously proposed algorithms suffer severe error performance degradation for NB-LDPC codes with low column weights. In this paper, a weighted bit-reliability based (wBRB) decoder for NB-LDPC codes is developed and implemented with efficient layered partial-parallel structure. It not only balances the tradeoff between complexity and error performance, but also reduces the memory usage significantly. Furthermore, to enhance the performance of the wBRB decoder, a full bit-reliability-based (FBRB) decoder is proposed. The FBRB decoder is derived based on the binary matrix representation of the nonzero entries in the parity-check matrix. Since more bit-reliability values are passed through the edges of the Tanner graph, the FBRB decoder can achieve better error performance and faster convergence rate than the wBRB decoder. Both of the decoders are implemented on a Xilinx Virtex-5 XC5VLX155T FPGA device for a (403,226) code over GF(25). The results shows that they achieve 118.98 and 95.73 Mbps throughput with 15 iterations, respectively.