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arXiv:2611.00404

Early Fault-Tolerant Magic State Synthesis and Spacetime Efficient Analog Rotations with Color Code on a Superconducting Quantum Processor

Sean Garner, Aaron Hoyt, Shuwen Kan, Samuel Stein, Chenxu Liu, Ang Li

quant-phSubmitted Oct 30, 2026• Announced Nov 3, 2026
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Abstract

With recent improvements to syndrome extraction scheduling and decoding, and the availability of complete transversal Clifford operations and lattice surgery, color code is an especially promising platform for quantum processors with local connectivity. The key ingredient for universal computation is thus generating useful magic states with limited resources. Space-Time Efficient Analog Rotations (STAR) and Fault-tolerant magic state synthesis (MSS) are two such methods for magic state generation, targeted for near-term and long-term quantum computing, respectively. In this work, we perform the first implementations of both magic state paradigms on a superconducting quantum processor. We present a STAR-type injection protocol on the color code, with favorable error rate and spacetime costs versus prior protocols on both the color and surface codes. We then implement a MSS factory by performing multi-patch magic state cultivations, interleaved with transversal Clifford operations, and lattice-surgery magic state teleportation. Under post-selection, we achieve a kickback tomography correct sign probability of $99.9859\%$ on cultivated $T_L$ states, $96\%$ tomographic fidelity on logical analog rotation states, and $91\%$ fidelity on synthesized logical magic states consuming 3 cultivated $T_L$ states, 3 transversal Hadamard operations, and real-time feed-forward $S_L$ corrections during magic state teleportation. We compare the efficacy of post-selection, Most-Likely-Error (MLE) decoding, and concatenated-matching decoding throughout, highlighting the potential of end-to-end color code computation.

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We introduce STAR-magic mutation, an efficient protocol for implementing logical rotation gates on early fault-tolerant quantum computers. This protocol judiciously combines two of the latest state preparation protocols: transversal multi-rotation protocol and magic state cultivation. It achieves a logical rotation gate with a favorable error scaling of $\mathcal{O}(θ_L^{2(1-Θ(1/d))}p_{\text{ph}})$, while requiring only the ancillary space of a single surface code patch. Here, $θ_L$ is the logical rotation angle, $p_{\text{ph}}$ is the physical error rate, and $d$ is the code distance. This scaling marks a significant improvement over the previous state-of-the-art, $\mathcal{O}(θ_L p_{\text{ph}})$, making our protocol particularly powerful for implementing a sequence of small-angle rotation gates, like Trotter-based circuits. Notably, for $θ_L \lesssim 10^{-5}$, our protocol achieves a two-order-of-magnitude reduction in both the execution time and the error rate of analog rotation gates compared to the standard $T$-gate synthesis using cultivated magic states. Building upon this protocol, we also propose a novel quantum computing architecture designed for early fault-tolerant quantum computers, dubbed ``STAR ver.~3". It employs a refined circuit compilation strategy based on Clifford+$T$+$φ$ gate set, rather than the conventional Clifford+$T$ or Clifford+$φ$ gate sets. We establish a theoretical bound on the feasible circuit size on this architecture and illustrate its capabilities by analyzing the spacetime costs for simulating the dynamics of quantum many-body systems. Specifically, we demonstrate that our architecture can simulate biologically-relevant molecules or lattice models at scales beyond the reach of exact classical simulation, with only a few hundred thousand physical qubits, even assuming a realistic error rate of $p_{\text{ph}}=10^{-3}$.

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Fault-tolerant quantum simulation is approaching a phase where encoding overhead, logical Clifford operations, magic-state preparation, and rotation synthesis must be optimized together for efficient implementation. Space-Time efficient Analog Rotation (STAR) architectures reduce two of these costs by preparing small-angle rotation magic states directly, and the transversal STAR variant further lowers the Clifford overhead. Existing concrete implementations, however, largely inherit the low $O(1/d^2)$ encoding rate of the surface code, while high-rate codes have not yet been integrated into comparably explicit architectures. Here, we introduce a high-rate STAR architecture for local lattice Hamiltonian simulation based on a symmetry-driven co-design of the algorithm, QEC code, and neutral-atom hardware. Translation symmetries of the target lattice determine the choice of bicycle chain codes, a tunable family of self-dual bivariate bicycle codes that natively implement Clifford gates required for lattice simulation. Disjoint logical representatives allow STAR injections to be performed in parallel on all $k$ logical qubits in a code block, amortizing resource state preparation and enabling practical post-selection rates. On neutral-atom platform, the same translation symmetry compiles the key logical operations into low-depth, hardware-native acousto-optic-deflector shifts. End-to-end estimates show that an $8 \times 8$ transverse-field Ising simulation to $T^* \approx 8 (zJ)^{-1}$ requires $2240$ physical qubits and $\sim 200$ s per shot, a $\sim 5.5\times$ space reduction relative to a surface code STAR baseline at comparable speed; for Fermi-Hubbard dynamics to $T^* \approx 4 (zt)^{-1}$, the corresponding estimates are $\sim 6300$ physical qubits and $\sim 200$ s per shot. These results provide a concrete route toward early fault-tolerant quantum simulation with high-rate codes.

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Scaling and logic in the colour code on a superconducting quantum processor

Nathan Lacroix, Alexandre Bourassa, Francisco J. H. Heras +97 more

Quantum error correction [1–4] is essential for bridging the gap between the error rates of physical devices and the extremely low error rates required for quantum algorithms. Recent error-correction demonstrations on superconducting processors [5–8] have focused primarily on the surface code [9], which offers a high error threshold but poses limitations for logical operations. The color code [10] enables more efficient logic, but it requires more complex stabilizer measurements and decoding. Measuring these stabilizers in planar architectures like superconducting qubits is challenging, and realizations of color codes [11–19] have not addressed performance scaling with code size on any platform. Here, we present a comprehensive demonstration of the color code on a superconducting processor [8]. Scaling the code distance from three to five suppresses logical errors by a factor of Λ 3/5 = 1.56(4). Simulations indicate this performance is below the threshold of the color code, and the color code may become more efficient than the surface code following modest device improvements. We test transversal Clifford gates with logical randomized benchmarking [20] and inject magic states [21], a key resource for universal computation, achieving fidelities exceeding 99 % with post-selection. Finally, we teleport logical states between color codes using lattice surgery [22]. This work establishes the color code as a compelling research direction to realize fault-tolerant quantum computation on superconducting processors in the near future.

arXiv:2412.14256•Nature•May 26, 2025•51 citations

A superconducting surface-code processor with lattice-surgery logical operations

Yanzhe Wang, Fanhao Shen, Haipeng Xie +31 more

Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of $0.0365(2)$ and $0.0282(1)$, respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical $X$ axis. For the logical $R_{X}(π/4)$ gate, we achieve a logical gate fidelity of $0.943_{-9}^{+10}$ conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.

quant-pharXiv:2606.06598•Jun 8, 2026•0 citations
With recent improvements to syndrome extraction scheduling and decoding, and the availability of complete transversal Clifford operations and lattice surgery, color code is an especially promising platform for quantum processors with local connectivity. The key ingredient for universal computation is thus generating useful magic states with limited resources. Space-Time Efficient Analog Rotations (STAR) and Fault-tolerant magic state synthesis (MSS) are two such methods for magic state generation, targeted for near-term and long-term quantum computing, respectively. In this work, we perform the first implementations of both magic state paradigms on a superconducting quantum processor. We present a STAR-type injection protocol on the color code, with favorable error rate and spacetime costs versus prior protocols on both the color and surface codes. We then implement a MSS factory by performing multi-patch magic state cultivations, interleaved with transversal Clifford operations, and lattice-surgery magic state teleportation. Under post-selection, we achieve a kickback tomography correct sign probability of 99.9859%99.9859\%99.9859% on cultivated TLT_LTL​ states, 96%96\%96% tomographic fidelity on logical analog rotation states, and 91%91\%91% fidelity on synthesized logical magic states consuming 3 cultivated TLT_LTL​ states, 3 transversal Hadamard operations, and real-time feed-forward SLS_LSL​ corrections during magic state teleportation. We compare the efficacy of post-selection, Most-Likely-Error (MLE) decoding, and concatenated-matching decoding throughout, highlighting the potential of end-to-end color code computation.
We introduce STAR-magic mutation, an efficient protocol for implementing logical rotation gates on early fault-tolerant quantum computers. This protocol judiciously combines two of the latest state preparation protocols: transversal multi-rotation protocol and magic state cultivation. It achieves a logical rotation gate with a favorable error scaling of O(θL2(1−Θ(1/d))pph)\mathcal{O}(θ_L^{2(1-Θ(1/d))}p_{\text{ph}})O(θL2(1−Θ(1/d))​pph​), while requiring only the ancillary space of a single surface code patch. Here, θLθ_LθL​ is the logical rotation angle, pphp_{\text{ph}}pph​ is the physical error rate, and ddd is the code distance. This scaling marks a significant improvement over the previous state-of-the-art, O(θLpph)\mathcal{O}(θ_L p_{\text{ph}})O(θL​pph​), making our protocol particularly powerful for implementing a sequence of small-angle rotation gates, like Trotter-based circuits. Notably, for θL≲10−5θ_L \lesssim 10^{-5}θL​≲10−5, our protocol achieves a two-order-of-magnitude reduction in both the execution time and the error rate of analog rotation gates compared to the standard TTT-gate synthesis using cultivated magic states. Building upon this protocol, we also propose a novel quantum computing architecture designed for early fault-tolerant quantum computers, dubbed ``STAR ver.~3". It employs a refined circuit compilation strategy based on Clifford+TTT+φφφ gate set, rather than the conventional Clifford+TTT or Clifford+φφφ gate sets. We establish a theoretical bound on the feasible circuit size on this architecture and illustrate its capabilities by analyzing the spacetime costs for simulating the dynamics of quantum many-body systems. Specifically, we demonstrate that our architecture can simulate biologically-relevant molecules or lattice models at scales beyond the reach of exact classical simulation, with only a few hundred thousand physical qubits, even assuming a realistic error rate of pph=10−3p_{\text{ph}}=10^{-3}pph​=10−3.
Magic-state preparation is a central component of fault-tolerant quantum computing. Recent theoretical and experimental successes in code-switch-based magic-state preparation have underscored the promise of these methods for quantum error correction. Similarly, magic-state cultivation has likewise been demonstrated in both numerical and experimental settings. However, a thorough comparison between magic-state cultivation and code-switch-based magic-state factories is still missing. In this work, we carry out end-to-end simulations of magic-state preparation using code switching and compare its resource requirements and performance against magic-state cultivation. As part of this analysis, we develop a lattice-surgery protocol for transfer between the doubled color code and the rotated surface code. We extend the complete code-switching protocol to the d=5d=5d=5 doubled color code and perform the corresponding end-to-end simulations. Finally, we propose two fault-tolerant magic-state preparation protocols that combine phase-kickback checks with a transversal non-Clifford gate.
Efficient Magic State Cultivation for T\sqrt{T}T​ Gates
Recently, experimental and theoretical quantum error correction methodology has seen remarkable breakthroughs. In particular, magic state cultivation has been shown to simplify magic-state preparation and make it feasible for near-term devices. However, recent research on magic state cultivation has focused primarily on the cultivation of T∣+>LT\left| + \right>_LT∣+⟩L​. Only a few other magic state cultivation methods beyond T∣+>LT\left| + \right>_LT∣+⟩L​ have been investigated. Here, we generalize phase kickback checks for magic states at arbitrary Clifford hierarchy levels in specific codes. We provide an example of cultivation of T∣+>L\sqrt{T}\left| + \right>_LT​∣+⟩L​ in the doubled color code and the corresponding escape strategy using lattice surgery from the color code to large rotated surface codes. Using state vector simulation for un-grown cultivation, we observe a strong consistence between S∣+>LS\left| + \right>_LS∣+⟩L​ and T∣+>L\sqrt{T}\left| + \right>_LT​∣+⟩L​ cultivation's performance on the doubled color code. Finally, we discuss the application of the corresponding T∣+>L\sqrt{T}\left| + \right>_LT​∣+⟩L​ cultivation, incorporating the STAR architecture and TTT gates, for early fault-tolerant quantum computing and its potential to shorten gate synthesis in the fully fault-tolerant quantum computing era.
Fault-tolerant quantum simulation is approaching a phase where encoding overhead, logical Clifford operations, magic-state preparation, and rotation synthesis must be optimized together for efficient implementation. Space-Time efficient Analog Rotation (STAR) architectures reduce two of these costs by preparing small-angle rotation magic states directly, and the transversal STAR variant further lowers the Clifford overhead. Existing concrete implementations, however, largely inherit the low O(1/d2)O(1/d^2)O(1/d2) encoding rate of the surface code, while high-rate codes have not yet been integrated into comparably explicit architectures. Here, we introduce a high-rate STAR architecture for local lattice Hamiltonian simulation based on a symmetry-driven co-design of the algorithm, QEC code, and neutral-atom hardware. Translation symmetries of the target lattice determine the choice of bicycle chain codes, a tunable family of self-dual bivariate bicycle codes that natively implement Clifford gates required for lattice simulation. Disjoint logical representatives allow STAR injections to be performed in parallel on all kkk logical qubits in a code block, amortizing resource state preparation and enabling practical post-selection rates. On neutral-atom platform, the same translation symmetry compiles the key logical operations into low-depth, hardware-native acousto-optic-deflector shifts. End-to-end estimates show that an 8×88 \times 88×8 transverse-field Ising simulation to T∗≈8(zJ)−1T^* \approx 8 (zJ)^{-1}T∗≈8(zJ)−1 requires 224022402240 physical qubits and ∼200\sim 200∼200 s per shot, a ∼5.5×\sim 5.5\times∼5.5× space reduction relative to a surface code STAR baseline at comparable speed; for Fermi-Hubbard dynamics to T∗≈4(zt)−1T^* \approx 4 (zt)^{-1}T∗≈4(zt)−1, the corresponding estimates are ∼6300\sim 6300∼6300 physical qubits and ∼200\sim 200∼200 s per shot. These results provide a concrete route toward early fault-tolerant quantum simulation with high-rate codes.
Quantum error correction [1–4] is essential for bridging the gap between the error rates of physical devices and the extremely low error rates required for quantum algorithms. Recent error-correction demonstrations on superconducting processors [5–8] have focused primarily on the surface code [9], which offers a high error threshold but poses limitations for logical operations. The color code [10] enables more efficient logic, but it requires more complex stabilizer measurements and decoding. Measuring these stabilizers in planar architectures like superconducting qubits is challenging, and realizations of color codes [11–19] have not addressed performance scaling with code size on any platform. Here, we present a comprehensive demonstration of the color code on a superconducting processor [8]. Scaling the code distance from three to five suppresses logical errors by a factor of Λ 3/5 = 1.56(4). Simulations indicate this performance is below the threshold of the color code, and the color code may become more efficient than the surface code following modest device improvements. We test transversal Clifford gates with logical randomized benchmarking [20] and inject magic states [21], a key resource for universal computation, achieving fidelities exceeding 99 % with post-selection. Finally, we teleport logical states between color codes using lattice surgery [22]. This work establishes the color code as a compelling research direction to realize fault-tolerant quantum computation on superconducting processors in the near future.
Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of 0.0365(2)0.0365(2)0.0365(2) and 0.0282(1)0.0282(1)0.0282(1), respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical XXX axis. For the logical RX(π/4)R_{X}(π/4)RX​(π/4) gate, we achieve a logical gate fidelity of 0.943−9+100.943_{-9}^{+10}0.943−9+10​ conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.