Kerr-cat qubits offer a hardware-efficient route to fault-tolerant quantum computing by suppressing bit-flip errors exponentially, while phase-flip errors increase only linearly with the mean photon number. To maintain this protection, entangling operations must be bias-preserving, ensuring that phase-flip errors occurring during the gate do not propagate into bit-flip errors. In this paper, we propose an asymmetrically threaded SQUID (ATS) parametric coupler to implement high-fidelity, bias-preserving entangling gates between Kerr-cat qubits. By engineering a photon-number asymmetry between the control and target modes, we enable fast gate operations that suppress non-adiabatic leakage without complex pulse shaping. Through numerical simulations of the full circuit Hamiltonian, we demonstrate a bias-preserving CX gate achieving 99.69% fidelity in the absence of photon loss for a gate duration of 50 ns. Under a single-photon loss rate of 100 kHz, our protocol yields a noise bias of 9922, exceeding the noise bias of a naive non-bias-preserving CX implementation by approximately a factor of 570. These results support the ATS coupler as a valuable building block for concatenated cat-qubit architectures.
Kerr-cat qubits offer a hardware-efficient route to fault-tolerant quantum computing by suppressing bit-flip errors exponentially, while phase-flip errors increase only linearly with the mean photon number. To maintain this protection, entangling operations must be bias-preserving, ensuring that phase-flip errors occurring during the gate do not propagate into bit-flip errors. In this paper, we propose an asymmetrically threaded SQUID (ATS) parametric coupler to implement high-fidelity, bias-preserving entangling gates between Kerr-cat qubits. By engineering a photon-number asymmetry between the control and target modes, we enable fast gate operations that suppress non-adiabatic leakage without complex pulse shaping. Through numerical simulations of the full circuit Hamiltonian, we demonstrate a bias-preserving CX gate achieving 99.69% fidelity in the absence of photon loss for a gate duration of 50 ns. Under a single-photon loss rate of 100 kHz, our protocol yields a noise bias of 9922, exceeding the noise bias of a naive non-bias-preserving CX implementation by approximately a factor of 570. These results support the ATS coupler as a valuable building block for concatenated cat-qubit architectures.
Stabilized cat qubits that possess biased noise channel with bit-flip errors exponentially smaller than phase-flip errors. Together with a set of bias-preserving (BP) gates, cat qubits are a promising candidate for realizing hardware efficient quantum error correction and fault-tolerant quantum computing. Compared to dissipatively stabilized cat qubits, the Kerr cat qubits can in principle support faster gate operations with higher gate fidelity, benefiting from the large energy gap that protects the code space. However, the leakage of the Kerr cats can increase the minor type of errors and compromise the noise bias. Both the fast implementation of gates and the interaction with environment can lead to such detrimental leakage if no sophisticated controls are applied. In this work, we introduce new fine-control techniques to overcome the above obstacles for Kerr cat qubits. To suppress the gate leakage, we use the derivative-based transition suppression technique to design derivative-based controls for the Kerr BP gates. We show that the fine-controlled gates can simultaneously have high gate fidelity and high noise bias and when applied to concatenated quantum error correction, can not only improve the logical error rate but also reduce resource overhead. To suppress the environment-induced leakage, we introduce colored single-photon dissipation, which can continuously cool the Kerr cats and suppress the minor errors while not enhancing the major errors.
Stabilized cat codes can provide a biased noise channel with a set of bias-preserving (BP) gates, which can significantly reduce the resource overhead for fault-tolerant quantum computing. All existing schemes of BP gates, however, require adiabatic quantum evolution, with performance limited by excitation loss and non-adiabatic errors during the adiabatic gates. In this work, we apply a derivative-based leakage suppression technique to overcome non-adiabatic errors, so that we can implement fast BP gates on Kerr-cat qubits with improved gate fidelity while maintaining high noise bias. When applied to concatenated quantum error correction, the fast BP gates can not only improve the logical error rate but also reduce resource overhead, which enables more efficient implementation of fault-tolerant quantum computing.
Qubits with strongly biased noise, in which phase-flip errors are orders of magnitude more frequent than bit-flips, arise both naturally, as in electron and nuclear spins, and by engineering, as in stabilized cat qubits. This noise structure holds the promise of reducing the daunting hardware overhead of fault-tolerant quantum computing, but exploiting it requires physical operations that do not convert frequent phase-flips into rare bit-flips. In this review, we analyze the most prominent fault-tolerant protocols for biased-noise qubits, organized according to the available set of such bias-preserving operations. When this set is restricted to the CZ gate together with preparation and measurement in the X basis, we show that the complexity of the required syndrome extraction gadgets essentially cancels the benefit of the noise bias: at experimentally relevant error rates, one may as well ignore the bias and rely on standard error correction designed for depolarizing noise. The situation changes drastically when a bias-preserving CX gate is available: the hierarchy of errors can then be reflected in the structure of the code, with frequent phase-flips corrected by a dedicated high-threshold code and rare bit-flips by concatenation with a high-rate code. The same hierarchy also enables hardware-efficient preparation of magic states. Finally, as a bias-preserving CX is forbidden in naturally biased platforms and challenging in engineered ones, we present a measurement-based architecture in which a high-fidelity quantum non-demolition readout of multi-qubit Pauli Z operators takes its place, extending these overhead reductions to a much broader range of physical platforms.
Biased-noise qubits are a promising candidate for realizing hardware efficient fault-tolerant quantum computing. One promising biased-noise qubit is the Kerr cat qubit, which has recently been demonstrated experimentally. Despite various unique advantages of Kerr cat qubits, we explain how the noise bias of Kerr cat qubits is severely limited by heating-induced leakage in their current implementations. Then, we show that by adding frequency-selective single-photon loss to Kerr cat qubits we can counteract the leakage and thus recover much of their noise bias. We refer to such Kerr cat qubits combined with frequency-selective single-photon loss as colored Kerr cat qubits as they are protected by a colored dissipation. In particular, we show how a suitably engineered lossy environment can suppress the leakage and bit-flip errors of a Kerr cat qubit while not introducing any additional phase-flip errors. Since our scheme only requires single-photon loss, it can be readily implemented by using passive and linear elements. Moreover, our frequency-selectivity technique can be generally applied to energy-gap protected qubits whose computational basis states are given by near degenerate ground states of a Hamiltonian with a non-zero energy gap between the ground and excited state manifolds.
Stabilized cat codes can provide a biased noise channel with a set of bias-preserving (BP) gates, which can significantly reduce the resource overhead for fault-tolerant quantum computing. All existing schemes of BP gates, however, require adiabatic quantum evolution, with performance limited by excitation loss and nonadiabatic errors during the adiabatic gates. In this paper, we apply a derivative-based leakage-suppression technique to overcome nonadiabatic errors, so that we can implement fast BP gates on Kerr-cat qubits with improved gate fidelity while maintaining high noise bias. When applied to concatenated quantum error correction, the fast BP gates not only can improve the logical error rate but also can reduce resource overhead, which enables more efficient implementation of fault-tolerant quantum computing.
Cat qubits, a type of bosonic qubit encoded in a harmonic oscillator, can exhibit an exponential noise bias against bit-flip errors with increasing mean photon number. Here, we focus on cat qubits stabilized by two-photon dissipation, where pairs of photons are added and removed from a harmonic oscillator by an auxiliary, lossy buffer mode. This process requires a large loss rate and strong nonlinearities of the buffer mode that must not degrade the coherence and linearity of the oscillator. In this work, we show how to overcome this challenge by coloring the loss environment of the buffer mode with a multipole filter and optimizing the circuit to take into account additional inductances in the buffer mode. Using these techniques, we achieve near-ideal enhancement of cat-qubit bit-flip times with increasing photon number, reaching over 0.1 s with a mean photon number of only 4. Concurrently, our cat qubit remains highly phase coherent, with phase-flip times corresponding to an effective lifetime of T 1 , eff ≃ 70 μ s , comparable with the bare oscillator lifetime. We achieve this performance even in the presence of an ancilla transmon, used for reading out the cat-qubit states, by engineering a tunable oscillator-ancilla dispersive coupling. Furthermore, the low nonlinearity of the harmonic oscillator mode allows us to perform pulsed cat-qubit stabilization, an important control primitive, where the stabilization can remain off for a significant fraction (e.g., two-thirds) of a 3 μ s cycle without degrading bit-flip times. These advances are important for the realization of scalable error correction with cat qubits, where large noise bias and low phase-flip error rate enable the use of hardware-efficient outer error-correcting codes.