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arXiv:2610.26784

High-Accuracy Propagation-Assisted Local Decoding for Fast Transversal Clifford Circuits

Mark Webber, Simanraj Sadana, Matthew A. Lane, Lucy Jade Robson, Anthony O'Rourke

quant-phSubmitted Oct 19, 2026• Announced Oct 20, 2026• 0 citations
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Abstract

We benchmark the Iterative Redecode Scheme (IRS) on fast transversal Clifford circuits, achieving high-accuracy correlated decoding using local memory-style detectors and decoders. On a deep random Clifford benchmark, IRS yields approximately $4\times$ lower logical failure rates than the ghost protocol at $d=11$ with matched buffers, and $15\times$ lower rates than logical observable matching (LOM). In three-block GHZ preparation, IRS achieves $2\times$ lower logical error rates than reliable logical Pauli-product decoding with matched initialisation, improving to $25\times$ at $d=19$ with $\lceil d/2\rceil$ full initialisation rounds. We place IRS, which builds on Wan et al.'s scheme, within a broader propagation-assisted local (PAL) framework, where local decoders exchange messages rather than decoding a global hypergraph. IRS alternates local minimum-weight perfect matching (MWPM) on memory-equivalent detector error models (DEMs) with Pauli-frame propagation and detector updates across transversal CNOT layers, seeking local error estimates consistent with the global detector record. Prior-informed DEMs account for probabilities of propagated errors missing from the memory-equivalent model, improving initial decoding and reducing logical error rates. Zero-weight physical Pauli mechanisms enable inference and propagation of initially indeterminate stabilizer outcomes. Error rates saturate after a few iterations even for deep, adversarial alternating-tCNOT circuits, allowing iteration caps with negligible loss of accuracy. We find syndrome-extraction buffers of order $\lfloor d/4\rfloor$ sufficient for distance-dependent error suppression in the demanding regimes studied. The approach extends to other local decoders and CSS codes; for repeated logical $S$ gates, IRS achieves approximately $4$ to $10\times$ lower logical error rates than LOM, depending on initialisation.

Comments
22 pages, 13 figures (including appendix). Supporting simulation circuits and numerical data available at https://doi.org/10.5281/zenodo.23475403

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