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arXiv:2610.24213

Generalized Svetlichny Inequalities as a Cross-Platform Benchmark for Quantum Processors

Andrés Camilo Granda Arango, Giuseppe Sergioli, Luigi Iapichino, Tobias Valentin Bauer, Carlo Cuccu, Roberto Giuntini

quant-phSubmitted Oct 16, 2026• Announced Oct 20, 2026• 0 citations
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Abstract

A cross-platform benchmark should be device-independent yet sensitive to imperfections accumulated during execution. Building on prior work, we formulate and validate a protocol through demonstrations based on generalized Svetlichny inequality violations (a simulation, rather than a loophole-free certification, of multipartite nonlocality) for larger subsystem sizes. We apply it unchanged to three processors, the trapped-ion Marmot and IBEX Q1 (both manufactured by AQT) and the superconducting Euro-Q-Exa System 1 (IQM), using identical GHZ-state circuits with fixed theoretical measurement settings from N=2 to N=10 qubits. Both trapped-ion processors sustain violations up to ten qubits, while the superconducting processor loses them beyond six qubits under unmitigated (raw) conditions; readout-error mitigation recovers violations up to eight qubits, with a substantial fraction of the degradation attributable to measurement imperfections. These processors provide a heterogeneous testbed for validating the protocol's cross-platform applicability and discriminating power, demonstrating its practicality as a common framework for assessing collective quantum performance.

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12 pages, 5 figures, 2 tables

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A cross-platform benchmark should be device-independent yet sensitive to imperfections accumulated during execution. Building on prior work, we formulate and validate a protocol through demonstrations based on generalized Svetlichny inequality violations (a simulation, rather than a loophole-free certification, of multipartite nonlocality) for larger subsystem sizes. We apply it unchanged to three processors, the trapped-ion Marmot and IBEX Q1 (both manufactured by AQT) and the superconducting Euro-Q-Exa System 1 (IQM), using identical GHZ-state circuits with fixed theoretical measurement settings from N=2 to N=10 qubits. Both trapped-ion processors sustain violations up to ten qubits, while the superconducting processor loses them beyond six qubits under unmitigated (raw) conditions; readout-error mitigation recovers violations up to eight qubits, with a substantial fraction of the degradation attributable to measurement imperfections. These processors provide a heterogeneous testbed for validating the protocol's cross-platform applicability and discriminating power, demonstrating its practicality as a common framework for assessing collective quantum performance.
Benchmarking quantum processors is a central task in every roadmap aimed at quantum advantage. Here, we discuss a benchmarking protocol based on the violation of the Svetlichny inequality, which is designed to simulate genuine multipartite nonlocality. We compare it with Mermin's inequality, and present the results of applying this framework to two different quantum processing units -the superconducting system Garnet (from IQM) and the ion-trap system Marmot (from AQT), testing different families of quantum circuits for three to five qubits under identical experimental conditions. We also run simultaneous triplet tests across the full register, including a comparison between GHZ and linear cluster states, to probe how Svetlichny-inequality violations depend on qubit location and calibration. Our results demonstrate that tests based on genuine multipartite nonlocality provide a powerful tool to characterize the collective performance of quantum devices and to guide their calibration and optimization.
Multipartite Bell tests provide a correlation-only route to benchmarking quantum processors, but their application at large scales is hindered by the rapid decay of many-body correlators under noise and exponentially many terms in conventional Bell expressions. Here we address these scalability obstacles by introducing a finite-setting generalized Mermin family of state-tailored Bell inequalities with analytic certification bounds, in which the measurement-setting number mmm provides an additional certification dimension complementary to the system size nnn. We show that, for the powers-of-two setting choices considered here, increasing mmm leaves the ideal normalized multipartite quantum value unchanged while lowering the relevant classical bounds, thereby strengthening the Bell-violation ratios and yielding an improved noise-robustness scaling compared to the standard Mermin inequality. We test this construction experimentally on a programmable superconducting processor by preparing Greenberger-Horne-Zeilinger (GHZ) states of up to 80 qubits. Using randomized sampling for direct Bell-operator estimation, we observe Bell ratios that grow exponentially with system size, certify a nonlocality depth of 14, and show that increasing mmm strengthens both the Bell ratio and depth certification. All results are obtained solely from measured correlators and analytical bounds, without readout correction, tomography, or model-based mitigation. Generalized Mermin inequalities therefore provide a sharper Bell benchmark for noisy large-scale GHZ states.
Both Superconducting and Ion-Trap are leading quantum architectures common in the current landscape of the quantum computing field, each with distinct characteristics and operational constraints. Understanding and measuring the underlying \underline{quantumness} of these devices is essential for assessing their readiness for practical applications and guiding future progress and research. Building on earlier work (Meirom, Mor and Weinstein Arxiv 2505.12441), we utilize a benchmarking strategy applicable for comparing these two architectures by measuring "quantumness" directly on optimal sub-chips. Distinct from existing metrics, our approach employs rigorous binary fidelity thresholds derived from the classical limits of state transfer. This enables us to definitively establish quantum advantage of a designated sub-region. Here we apply this quality assurance methodology to platforms from both technologies. This comparison provides a protocol-based evaluation of quantumness advantage, revealing not only the strengths and weaknesses of each tested chip and its sub-chips but also offering a common language for their assessment. By abstracting away technical differences in the final result, we demonstrate a benchmarking strategy that bridges the gap between disparate quantum-circuit technologies, enabling fair performance comparisons and establishing a critical foundation for evaluating future claims of quantum advantage. This work was made possible by policies of two companies who enable independent and objective assessment on their quantum computers and sub-chips. In the name of science, we encourage other companies to emulate the independent qubit availability and the fair pricing which allow researchers to preform such assessments.
The Grothendieck constant represents one of the most profound connections between pure mathematics and quantum physics, relating the optimization power of real Hilbert spaces to that of binary variables. In the context of Bell inequality violations, the CHSH-restricted Grothendieck constant KCHSHG= √2 provides the fundamental ratio between quantum and classical correlation bounds, yet direct experimental verification of this constant on quantum hardware has remained elusive despite its central importance to quantum information theory. Here we report the first systematic, multi-platform measurement of KCHSHG using both trapped-ion (IonQ Forte Enterprise) and superconducting (IBM Torino) quantum processors. Through a comprehensive visibility sweep protocol spanning visibility parameters v ∈ [0.1,1.0], we extract KCHSHG= 1.408 ±0.006 on IonQ and KCHSHG= 1.363 ±0.012 on IBM, achieving deviations of only 0.44% and 3.6% from the theoretical value √2 ≈1.4142, respectively. The IonQ measurement represents, to our knowledge, the most precise systematic measurement of the Grothendieck bound, enabled by the superior coherence properties of trapped-ion systems. Simultaneously, we establish an empirical relationship between the de Finetti error ε and the CHSH parameter S, finding a remarkably precise linear scaling ε = 0.498 ×S −0.468 (for S > Scrit) with R2 = 0.9999, which provides an operational connection between entanglement quantification and Bell inequality violation magnitude that has not been previously demonstrated experimentally. This relationship enables direct estimation of entanglement from Bell measurements without requiring full state tomography. Our cross-platform validation demonstrates that while both architectures achieve similar maximum CHSH values (∼96% of Tsirelson bound), trapped-ion systems exhibit significantly superior precision for fundamental constant measurements, suggesting their preferential use for metrological applications in quantum foundations. These findings have immediate implications for quantum cryptography, device-independent protocols, and the certification of quantum advantage in near-term quantum devices.
Readout errors are one of the dominant sources of noise in current quantum processors, limiting both expectation-value estimation and sampling-based applications. Since they affect only the classical measurement outcomes, they can be addressed using classical coding techniques: immediately before measurement, each data qubit is redundantly encoded with ancilla qubits, and the resulting bit string is decoded either by post-selection or by majority voting. Unlike conventional readout error mitigation, which corrects only aggregate quantities such as expectation values, this approach operates on individual measurement shots and can therefore produce approximately corrected samples. We present a systematic cross-platform and cross-generation experimental evaluation of repetition-code readout error detection and correction. We benchmark the same protocol on IBM Heron r1-r3 superconducting processors and Quantinuum H1 and H2 trapped-ion processors while independently varying the code distance, hardware generation, and encoding layout. We find that both error detection and correction improve readout fidelity on every device and generation tested, even as the unencoded baseline improves substantially across successive hardware releases. At the same time, the value of additional redundancy depends strongly on the underlying hardware. On superconducting processors, the extra gate errors introduced by the encoding rapidly offset its benefits, whereas on trapped-ion processors the much lower gate error rates allow larger code distances to remain advantageous.
Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms. Unlike classical systems, however, identical quantum circuits may exhibit substantially different behavior across devices due to architectural variations in qubit connectivity, gate fidelity, and coherence times. In this work, we systematically benchmark five representative quantum algorithms - Bell state preparation, GHZ state generation, Quantum Fourier Transform (QFT), Grover's Search, and the Quantum Approximate Optimization Algorithm (QAOA) - across trapped-ion, superconducting, and simulator backends using Amazon Braket. Performance metrics including fidelity, CHSH violation, success probability, circuit depth, and gate counts are evaluated. Our results demonstrate a strong dependence of algorithmic performance on hardware topology and noise characteristics. For example, 10-qubit GHZ states achieved fidelities above 0.8 on trapped-ion hardware, while superconducting platforms dropped below 0.15 due to routing overhead and accumulated two-qubit gate errors. These findings highlight the importance of hardware-aware algorithm selection and provide practical guidance for benchmarking in the NISQ era.