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arXiv:2610.06264

Suppressing Frequency Collisions in a Quantum Processor

Kuljeet Kaur, Xuexin Xu, Mohammad H. Ansari

quant-phSubmitted Oct 5, 2026• Announced Oct 6, 2026• 0 citations
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Abstract

Frequency crowding, the close spacing of qubit transitions, limits superconducting quantum processors through crosstalk, leakage, and spectator dependent errors. We introduce a Hamiltonian based framework that maps two- and three-body collision mechanisms onto a Max-k-Cut problem on qubit frequency allocation. In order to make larger lattices tractable, we introduce a cluster-stitching protocol that decomposes larger lattices into overlapping subgraphs and reconciles their local frequency assignments into globally consistent configurations. We tested our proposed framework across multiple qubit architectures to suppress dominant collision penalties by revealing a hardware residual crosstalk. We benchmark digitized counterdiabatic QAOA (DC-QAOA), standard QAOA, and simulated annealing. Counterdiabatic terms improve QAOA optimization near steep collision penalties, while simulated annealing achieves the lowest costs on the tested instances. These results indicate that our hardware-aware optimization connects microscopic interaction physics to processor-level frequency planning. These results enable a systematic solver for benchmarking of scalable software hardware co design.

Comments
14 pages, 5 figures

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Frequency crowding, the close spacing of qubit transitions, limits superconducting quantum processors through crosstalk, leakage, and spectator dependent errors. We introduce a Hamiltonian based framework that maps two- and three-body collision mechanisms onto a Max-k-Cut problem on qubit frequency allocation. In order to make larger lattices tractable, we introduce a cluster-stitching protocol that decomposes larger lattices into overlapping subgraphs and reconciles their local frequency assignments into globally consistent configurations. We tested our proposed framework across multiple qubit architectures to suppress dominant collision penalties by revealing a hardware residual crosstalk. We benchmark digitized counterdiabatic QAOA (DC-QAOA), standard QAOA, and simulated annealing. Counterdiabatic terms improve QAOA optimization near steep collision penalties, while simulated annealing achieves the lowest costs on the tested instances. These results indicate that our hardware-aware optimization connects microscopic interaction physics to processor-level frequency planning. These results enable a systematic solver for benchmarking of scalable software hardware co design.
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Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.
Crosstalk between qubits fundamentally limits the scalability of quantum processors, necessitating physics-based models that can handle the complexity of large qubit arrays. Here, we develop a comprehensive theoretical and experimental framework that captures residual interactions between both adjacent and non-adjacent qubits in fixed-frequency transmon lattices. The model integrates the combined effects of exponential localization in banded capacitance matrices, suppression of virtual couplings through detuning products across intermediate modes, and evanescent decay of below-cutoff electromagnetic fields, yielding predictive scaling relations for coupling strength as a function of spatial separation and spectral detuning. Experimental characterization of a 4×44 \times 44×4 superconducting-qubit lattice with inductive shunt pillars reveals exponential spatial decay and frequency-dependent suppression consistent with theoretical predictions, achieving quantitative agreement for all nearest-neighbor couplings across the \qtyrange[range-phrase = --, range-units = single]{4}{6}{\giga\hertz} operating range. Our results show that standard dispersive Hamiltonian approximations systematically overestimate long-range coupling when spatial and spectral dependencies are neglected; these errors propagate into circuit simulation and design strategies. Our framework provides design guidance for crosstalk mitigation in larger-scale quantum processors under realistic fabrication constraints, addressing a bottleneck in scalability.
Superconducting circuits are a leading platform for scalable quantum computing, where parametric modulation is a widely used technique for implementing high-fidelity multi-qubit operations. A critical challenge, however, is that this modulation can induce a dense landscape of parasitic couplings, leading to detrimental frequency collisions that constrain processor performance. In this work, we develop a comprehensive numerical framework, grounded in Floquet theory, to systematically analyze and mitigate these collisions. Our approach integrates this numerical analysis with newly derived analytical models for both qubit-modulated and coupler-modulated schemes, allowing us to characterize the complete map of parasitic sideband interactions and their distinct error budgets. This analysis forms the basis of a constraint-based optimization methodology designed to identify parameter configurations that satisfy the derived physical constraints, thereby avoiding detrimental parasitic interactions. We illustrate the utility of this framework with applications to analog quantum simulation and gate design. Our work provides a predictive tool for co-engineering device parameters and control protocols, enabling the systematic suppression of crosstalk and paving the way for large-scale, high-performance quantum processors.