Crosstalk between qubits fundamentally limits the scalability of quantum processors, necessitating physics-based models that can handle the complexity of large qubit arrays. Here, we develop a comprehensive theoretical and experimental framework that captures residual interactions between both adjacent and non-adjacent qubits in fixed-frequency transmon lattices. The model integrates the combined effects of exponential localization in banded capacitance matrices, suppression of virtual couplings through detuning products across intermediate modes, and evanescent decay of below-cutoff electromagnetic fields, yielding predictive scaling relations for coupling strength as a function of spatial separation and spectral detuning. Experimental characterization of a $4 \times 4$ superconducting-qubit lattice with inductive shunt pillars reveals exponential spatial decay and frequency-dependent suppression consistent with theoretical predictions, achieving quantitative agreement for all nearest-neighbor couplings across the \qtyrange[range-phrase = --, range-units = single]{4}{6}{\giga\hertz} operating range. Our results show that standard dispersive Hamiltonian approximations systematically overestimate long-range coupling when spatial and spectral dependencies are neglected; these errors propagate into circuit simulation and design strategies. Our framework provides design guidance for crosstalk mitigation in larger-scale quantum processors under realistic fabrication constraints, addressing a bottleneck in scalability.
Crosstalk between qubits fundamentally limits the scalability of quantum processors, necessitating physics-based models that can handle the complexity of large qubit arrays. Here, we develop a comprehensive theoretical and experimental framework that captures residual interactions between both adjacent and non-adjacent qubits in fixed-frequency transmon lattices. The model integrates the combined effects of exponential localization in banded capacitance matrices, suppression of virtual couplings through detuning products across intermediate modes, and evanescent decay of below-cutoff electromagnetic fields, yielding predictive scaling relations for coupling strength as a function of spatial separation and spectral detuning. Experimental characterization of a 4×4 superconducting-qubit lattice with inductive shunt pillars reveals exponential spatial decay and frequency-dependent suppression consistent with theoretical predictions, achieving quantitative agreement for all nearest-neighbor couplings across the \qtyrange[range-phrase = --, range-units = single]{4}{6}{\giga\hertz} operating range. Our results show that standard dispersive Hamiltonian approximations systematically overestimate long-range coupling when spatial and spectral dependencies are neglected; these errors propagate into circuit simulation and design strategies. Our framework provides design guidance for crosstalk mitigation in larger-scale quantum processors under realistic fabrication constraints, addressing a bottleneck in scalability.
Abstract Superconducting quantum circuits are a key platform for advancing quantum information processing and simulation. Scaling efforts currently encounter challenges such as Josephson-junction fabrication yield, design frequency targeting, and long-range crosstalk arising both from spurious microwave modes and intrinsic interactions between qubits. We demonstrate a scalable 4x4 square lattice with low crosstalk, comprising 16 fixed-frequency transmon qubits with nearest-neighbor capacitive coupling that is implemented in a tileable, 3D-integrated circuit architecture with off-chip inductive shunting to mitigate spurious enclosure modes. We report on the design and comprehensive characterization, and show that our implementation achieves targeted device parameters with very low frequency spreads, long-range parasitic couplings and simultaneous single-qubit gate errors across the device. Our results provide a promising pathway toward a scalable superconducting square lattice topology for quantum error correction and simulation.
As superconducting quantum processors continue to scale, high-performance quantum control becomes increasingly critical. In densely integrated architectures, unwanted interactions between nearby qubits give rise to crosstalk errors that limit operational performance. In particular, direct exchange-type (XY) interactions are typically minimized by designing large frequency detunings between neighboring qubits at the hardware level. However, frequency crowding in large-scale systems ultimately restricts the achievable frequency separation. While such XY coupling facilitates entangling gate operations, its residual presence poses a key challenge during single-qubit controls. Here, we propose a scalable pulse-level control framework, incorporating frequency modulation (FM) and dynamical decoupling (DD), to suppress XY crosstalk errors. This framework operates independently of coupling strengths, reducing calibration overhead and naturally supporting multi-qubit connectivity. Numerical simulations show orders-of-magnitude reductions in infidelity for both idle and single-qubit gates in a two-qubit system. We further validate scalability in a five-qubit layout, where crosstalk between a central qubit and four neighbors is simultaneously suppressed. Our crosstalk suppression framework provides a practical route toward high-fidelity operation in dense superconducting architectures.
As superconducting quantum processors continue to scale, high-performance quantum control becomes increasingly critical. In densely integrated architectures, unwanted interactions between nearby qubits give rise to crosstalk errors that limit operational performance. In particular, direct exchange-type ( XY ) interactions are typically minimized by designing large frequency detunings between neighboring qubits at the hardware level. However, frequency crowding in large-scale systems ultimately restricts the achievable frequency separation. While such XY coupling facilitates entangling gate operations, its residual presence poses a key challenge during single-qubit controls. Here, we propose a scalable pulse-level control framework, incorporating frequency modulation and dynamical decoupling to suppress XY crosstalk errors. This framework operates independently of coupling strengths, reducing calibration overhead and naturally supporting multiqubit connectivity. Numerical simulations show orders-of-magnitude reductions in infidelity for both idle and single-qubit gates in a two-qubit system. We further illustrate scalability in a five-qubit layout, where crosstalk between a central qubit and four neighbors is simultaneously suppressed. Our crosstalk suppression framework provides a practical route toward high-fidelity operation in dense superconducting architectures.
Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.
Superconducting circuits have been demonstrated at the ~50 qubit scale, with gate fidelities approaching the thresholds required for error correction using surface codes. It is generally considered that maintaining and improving this performance while scaling to >100 qubits will require 3D integration of control wiring, and techniques to prevent or mitigate the effects of unwanted electromagnetic modes which emerge in the circuit environment at larger scales. At the present time, no single design has emerged as the clear scaling "winner'', and many different modalities are being explored. In this thesis, we describe one potential scaling architecture for superconducting circuits, which is based on a unit cell containing a set of controllable, measurable qubits. In analogy to the unit cell of a crystal, this unit cell can be tiled, in this case to form 2D arrays of individually controllable and measurable qubits. This is enabled by three key technologies: 3D integrated off-chip control wiring, reverse-side readout resonators, and inductive shunting of the device enclosure with micromachined pillars. To validate this approach, we design and build a demonstration device featuring four transmon qubits and containing within it a single unit cell of the architecture. The device construction involves the fabrication of reverse-side circuits and the use of novel CNC drilling of the circuit substrate. We measure coherence times and single-qubit gate fidelities comparable with the state-of-the-art for transmon qubits (avg. T1 = 149 µs, avg. echoed pure dephasing T2 = 189 µs, avg. F > 99.98%), establishing that the design is compatible with high coherence. An important feature of the design is that the infinite construct formed by tiling the plane with the unit cell possesses a cutoff frequency, below which the circuit environment cannot sustain any electromagnetic modes. We develop models to predict this cutoff frequency, and predict that environment mediated crosstalk between qubits inside this structure decays exponentially with spatial separation. This crosstalk can be viewed as being mediated by evanescent waveguide modes, or by bound states formed by the interaction of qubits with the environmental modes around the cutoff. Both models provide quantitative predictions for the rate of crosstalk decay, which are shown to be in good agreement. We propose this architecture as a promising candidate for building 2D arrays of hundreds or thousands of nearest neighbour coupled superconducting qubits, which could provide a testbed of quantum error correction schemes such as the surface code.
Superconducting quantum circuits are typically housed in conducting enclosures in order to control their electromagnetic environment. As devices grow in physical size, the electromagnetic modes of the enclosure come down in frequency and can introduce unwanted long-range cross-talk between distant elements of the enclosed circuit. Incorporating arrays of inductive shunts such as through-substrate vias or machined pillars can suppress these effects by raising these mode frequencies. Here, we derive simple, accurate models for the modes of enclosures that incorporate such inductive-shunt arrays. We use these models to predict that cavity-mediated interqubit couplings and drive-line cross-talk are exponentially suppressed with distance for arbitrarily large quantum circuits housed in such enclosures, indicating the promise of this approach for quantum computing. We find good agreement with a finite-element simulation of an example device containing more than 400 qubits.